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Iglesias" , Richard Henderson , Greg Kurz , Aurelien Jarno , Peter Maydell , qemu-ppc@nongnu.org, Daniel Henrique Barboza , Aleksandar Rikalo , Paolo Bonzini , David Gibson , Jiaxun Yang , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Yoshinori Sato , Nicholas Piggin , Xiaojuan Yang , qemu-arm@nongnu.org Subject: [PATCH 05/12] tcg/tcg-op: Factor tcg_gen_hrev64_i64() out Date: Tue, 22 Aug 2023 14:40:35 +0200 Message-ID: <20230822124042.54739-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230822124042.54739-1-philmd@linaro.org> References: <20230822124042.54739-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Similarly to tcg_gen_hrev32_i32() for 32-bit values, extract tcg_gen_hrev64_i64() for 64-bit ones. Signed-off-by: Philippe Mathieu-Daudé --- docs/devel/tcg-ops.rst | 4 +++- include/tcg/tcg-op-common.h | 1 + tcg/tcg-op.c | 29 +++++++++++++++++++++++------ 3 files changed, 27 insertions(+), 7 deletions(-) diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst index 17965faa03..e8a2f8aacc 100644 --- a/docs/devel/tcg-ops.rst +++ b/docs/devel/tcg-ops.rst @@ -492,7 +492,9 @@ Misc * - hrev32_i32 *t0*, *t1* - - | Byteswap each halfword within a 32-bit value. + hrev64_i64 *t0*, *t1* + + - | Byteswap each halfword within a 32/64-bit value. * - hswap_i32/i64 *t0*, *t1* diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h index bb515dfd51..a9184caf9d 100644 --- a/include/tcg/tcg-op-common.h +++ b/include/tcg/tcg-op-common.h @@ -562,6 +562,7 @@ void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags); void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg); void tcg_gen_hswap_i64(TCGv_i64 ret, TCGv_i64 arg); void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg); +void tcg_gen_hrev64_i64(TCGv_i64 ret, TCGv_i64 arg); void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2); void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2); void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2); diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index b1b5d9b45b..310acce410 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -1876,12 +1876,7 @@ void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg) TCGv_i64 t2 = tcg_temp_ebb_new_i64(); /* arg = abcdefgh */ - tcg_gen_movi_i64(t2, 0x00ff00ff00ff00ffull); - tcg_gen_shri_i64(t0, arg, 8); /* t0 = .abcdefg */ - tcg_gen_and_i64(t1, arg, t2); /* t1 = .b.d.f.h */ - tcg_gen_and_i64(t0, t0, t2); /* t0 = .a.c.e.g */ - tcg_gen_shli_i64(t1, t1, 8); /* t1 = b.d.f.h. */ - tcg_gen_or_i64(ret, t0, t1); /* ret = badcfehg */ + tcg_gen_hrev64_i64(ret, arg); /* ret = badcfehg */ tcg_gen_movi_i64(t2, 0x0000ffff0000ffffull); tcg_gen_shri_i64(t0, ret, 16); /* t0 = ..badcfe */ @@ -1936,6 +1931,28 @@ void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg) tcg_gen_rotli_i64(ret, arg, 32); } +/* + * hrev64_i64: Byteswap each halfwords within a 64-bit value. + * + * Byte pattern: hrev64_i64(abcdefgh) -> badcfehg + */ +void tcg_gen_hrev64_i64(TCGv_i64 ret, TCGv_i64 arg) +{ + TCGv_i64 mask = tcg_constant_i64(0x00ff00ff00ff00ffull); + TCGv_i64 t1 = tcg_temp_ebb_new_i64(); + TCGv_i64 t2 = tcg_temp_ebb_new_i64(); + + /* arg = abcdefgh */ + tcg_gen_shri_i64(t1, arg, 8); /* t1 = .abcdefg */ + tcg_gen_and_i64(t2, t1, mask); /* t2 = .a.c.e.g */ + tcg_gen_and_i64(t1, arg, mask); /* t1 = .b.d.f.h */ + tcg_gen_shli_i64(t1, t1, 8); /* t1 = b.d.f.h. */ + tcg_gen_or_i64(ret, t1, t2); /* ret = badcfehg */ + + tcg_temp_free_i64(t1); + tcg_temp_free_i64(t2); +} + void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg) { if (TCG_TARGET_REG_BITS == 32) {