@@ -465,6 +465,7 @@ static inline void set_pc(CPULoongArchState *env, uint64_t value)
#define HW_FLAGS_LSPW 0x200
#define HW_FLAGS_LAM 0x400
#define HW_FLAGS_LSX 0x800
+#define HW_FLAGS_IOCSR 0x2000
static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
uint64_t *cs_base, uint32_t *flags)
@@ -481,6 +482,7 @@ static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
*flags |= FIELD_EX32(env->cpucfg[2], CPUCFG2, LSPW) * HW_FLAGS_LSPW;
*flags |= FIELD_EX32(env->cpucfg[2], CPUCFG2, LAM) * HW_FLAGS_LAM;
*flags |= FIELD_EX32(env->cpucfg[2], CPUCFG2, LSX) * HW_FLAGS_LSX;
+ *flags |= FIELD_EX32(env->cpucfg[1], CPUCFG1, IOCSR) * HW_FLAGS_IOCSR;
}
void loongarch_cpu_list(void);
@@ -286,12 +286,19 @@ static bool trans_csrxchg(DisasContext *ctx, arg_csrxchg *a)
return true;
}
+#define REQUIRE_IOCSR do { \
+ if ((ctx->base.tb->flags & HW_FLAGS_IOCSR) == 0) { \
+ return false; \
+ } \
+} while (0)
+
static bool gen_iocsrrd(DisasContext *ctx, arg_rr *a,
void (*func)(TCGv, TCGv_ptr, TCGv))
{
TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
+ REQUIRE_IOCSR;
if (check_plv(ctx)) {
return false;
}
@@ -305,6 +312,7 @@ static bool gen_iocsrwr(DisasContext *ctx, arg_rr *a,
TCGv val = gpr_src(ctx, a->rd, EXT_NONE);
TCGv addr = gpr_src(ctx, a->rj, EXT_NONE);
+ REQUIRE_IOCSR;
if (check_plv(ctx)) {
return false;
}
Signed-off-by: Song Gao <gaosong@loongson.cn> --- target/loongarch/cpu.h | 2 ++ target/loongarch/insn_trans/trans_privileged.c.inc | 8 ++++++++ 2 files changed, 10 insertions(+)