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[1/6] hw/i386/intel_iommu: Fix trivial endianness problems

Message ID 20230802135723.178083-2-thuth@redhat.com
State New
Headers show
Series Fix endianness issues in the intel-iommu device | expand

Commit Message

Thomas Huth Aug. 2, 2023, 1:57 p.m. UTC 
After reading the guest memory with dma_memory_read(), we have
to make sure that we byteswap the little endian data to the host's
byte order.

Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 hw/i386/intel_iommu.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Philippe Mathieu-Daudé Aug. 2, 2023, 9:13 p.m. UTC | #1 
On 2/8/23 15:57, Thomas Huth wrote:
> After reading the guest memory with dma_memory_read(), we have
> to make sure that we byteswap the little endian data to the host's
> byte order.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>   hw/i386/intel_iommu.c | 5 +++++
>   1 file changed, 5 insertions(+)

Maybe worth adding a comment in "hw/i386/intel_iommu.h"
around VTDPASIDEntry::val mentioning little endianness.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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Patch

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index dcc334060c..13fcde8e91 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -756,6 +756,8 @@  static int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base,
         return -VTD_FR_PASID_TABLE_INV;
     }
 
+    pdire->val = le64_to_cpu(pdire->val);
+
     return 0;
 }
 
@@ -780,6 +782,9 @@  static int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s,
                         pe, entry_size, MEMTXATTRS_UNSPECIFIED)) {
         return -VTD_FR_PASID_TABLE_INV;
     }
+    for (size_t i = 0; i < ARRAY_SIZE(pe->val); i++) {
+        pe->val[i] = le64_to_cpu(pe->val[i]);
+    }
 
     /* Do translation type check */
     if (!vtd_pe_type_check(x86_iommu, pe)) {