| Message ID | 20230714232659.76434-2-chris@laplante.io |
|---|---|
| State | New |
| Headers | show |
| Series | Add nRF51 DETECT signal with test | expand |
On Sat, 15 Jul 2023 at 00:27, Chris Laplante <chris@laplante.io> wrote: > > Implement nRF51 DETECT signal in the GPIO peripheral. > > The reference manual makes mention of a per-pin DETECT signal, but these > are not exposed to the user. See https://devzone.nordicsemi.com/f/nordic-q-a/39858/gpio-per-pin-detect-signal-available > for more information. Currently, I don't see a reason to model these. I agree -- they seem to be internal to the GPIO module, so we don't need to model them as qemu_irq lines. > Signed-off-by: Chris Laplante <chris@laplante.io> > --- > hw/arm/nrf51_soc.c | 1 + > hw/gpio/nrf51_gpio.c | 14 +++++++++++++- > include/hw/gpio/nrf51_gpio.h | 1 + > 3 files changed, 15 insertions(+), 1 deletion(-) > > diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c > index 34da0d62f0..7ae54e18be 100644 > --- a/hw/arm/nrf51_soc.c > +++ b/hw/arm/nrf51_soc.c > @@ -150,6 +150,7 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) > > /* Pass all GPIOs to the SOC layer so they are available to the board */ > qdev_pass_gpios(DEVICE(&s->gpio), dev_soc, NULL); > + qdev_pass_gpios(DEVICE(&s->gpio), dev_soc, "detect"); Is the DETECT line really exposed external to the SoC? I had a look at the nRF51822 datasheet and it suggests not. For purposes of supporting the wake-up-on-gpio functionality we don't need to expose it to the board -- the SoC layer can just wire it up to the POWER device. (In fact, exposing it to the board makes it harder, because you can't connect one qemu_irq to two places, so if we let the board connect it somewhere then the SoC can't conveniently connect it to the POWER device without doing extra work to split it.) The logic for calculating DETECT looks good to me. thanks -- PMM
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index 34da0d62f0..7ae54e18be 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -150,6 +150,7 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) /* Pass all GPIOs to the SOC layer so they are available to the board */ qdev_pass_gpios(DEVICE(&s->gpio), dev_soc, NULL); + qdev_pass_gpios(DEVICE(&s->gpio), dev_soc, "detect"); /* TIMER */ for (i = 0; i < NRF51_NUM_TIMERS; i++) { diff --git a/hw/gpio/nrf51_gpio.c b/hw/gpio/nrf51_gpio.c index b47fddf4ed..08396c69a4 100644 --- a/hw/gpio/nrf51_gpio.c +++ b/hw/gpio/nrf51_gpio.c @@ -78,6 +78,7 @@ static void update_state(NRF51GPIOState *s) int pull; size_t i; bool connected_out, dir, connected_in, out, in, input; + bool assert_detect = false; for (i = 0; i < NRF51_GPIO_PINS; i++) { pull = pull_value(s->cnf[i]); @@ -99,7 +100,15 @@ static void update_state(NRF51GPIOState *s) qemu_log_mask(LOG_GUEST_ERROR, "GPIO pin %zu short circuited\n", i); } - if (!connected_in) { + if (connected_in) { + uint32_t detect_config = extract32(s->cnf[i], 16, 2); + if ((detect_config == 2) && (in == 1)) { + assert_detect = true; + } + if ((detect_config == 3) && (in == 0)) { + assert_detect = true; + } + } else { /* * Floating input: the output stimulates IN if connected, * otherwise pull-up/pull-down resistors put a value on both @@ -116,6 +125,8 @@ static void update_state(NRF51GPIOState *s) } update_output_irq(s, i, connected_out, out); } + + qemu_set_irq(s->detect, assert_detect); } /* @@ -291,6 +302,7 @@ static void nrf51_gpio_init(Object *obj) qdev_init_gpio_in(DEVICE(s), nrf51_gpio_set, NRF51_GPIO_PINS); qdev_init_gpio_out(DEVICE(s), s->output, NRF51_GPIO_PINS); + qdev_init_gpio_out_named(DEVICE(s), &s->detect, "detect", 1); } static void nrf51_gpio_class_init(ObjectClass *klass, void *data) diff --git a/include/hw/gpio/nrf51_gpio.h b/include/hw/gpio/nrf51_gpio.h index 8f9c2f86da..fcfa2bac17 100644 --- a/include/hw/gpio/nrf51_gpio.h +++ b/include/hw/gpio/nrf51_gpio.h @@ -64,6 +64,7 @@ struct NRF51GPIOState { uint32_t old_out_connected; qemu_irq output[NRF51_GPIO_PINS]; + qemu_irq detect; };
Implement nRF51 DETECT signal in the GPIO peripheral. The reference manual makes mention of a per-pin DETECT signal, but these are not exposed to the user. See https://devzone.nordicsemi.com/f/nordic-q-a/39858/gpio-per-pin-detect-signal-available for more information. Currently, I don't see a reason to model these. Signed-off-by: Chris Laplante <chris@laplante.io> --- hw/arm/nrf51_soc.c | 1 + hw/gpio/nrf51_gpio.c | 14 +++++++++++++- include/hw/gpio/nrf51_gpio.h | 1 + 3 files changed, 15 insertions(+), 1 deletion(-)