Message ID | 20230710175102.32429-2-philmd@linaro.org |
---|---|
State | New |
Headers | show |
Series | hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop | expand |
On 7/10/23 18:50, Philippe Mathieu-Daudé wrote: > The pl011_read() and pl011_write() handlers shift the offset > argument by 2, so are implemented on a 32-bit boundary. > > Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org> > --- > hw/char/pl011.c | 2 ++ > 1 file changed, 2 insertions(+) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 77bbc2a982..73f1a3aea2 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -358,6 +358,8 @@ static const MemoryRegionOps pl011_ops = { .read = pl011_read, .write = pl011_write, .endianness = DEVICE_NATIVE_ENDIAN, + .impl.min_access_size = 4, + .impl.max_access_size = 4, }; static bool pl011_clock_needed(void *opaque)
The pl011_read() and pl011_write() handlers shift the offset argument by 2, so are implemented on a 32-bit boundary. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/char/pl011.c | 2 ++ 1 file changed, 2 insertions(+)