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Mon, 10 Jul 2023 09:03:03 -0500 From: Francisco Iglesias To: CC: , , , , , , , Subject: [PATCH v1 6/8] hw/misc: Introduce a model of Xilinx Versal's CFRAME_BCAST_REG Date: Mon, 10 Jul 2023 16:02:47 +0200 Message-ID: <20230710140249.56324-7-francisco.iglesias@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230710140249.56324-1-francisco.iglesias@amd.com> References: <20230710140249.56324-1-francisco.iglesias@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT115:EE_|MW4PR12MB6777:EE_ X-MS-Office365-Filtering-Correlation-Id: 98a52b0f-3193-4df5-2219-08db814e6a9d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 7ICF452GmmJeS2nXUPVeIGMBljRfTSFs9mYyfjqgDUhS70yYKHQJGt14F6LQhSReH/CE7+oE/Mzako9FwApZ/Qodk9w5GopsV26sEaAgrxkTQ7YQRfaUoOT5n5XBmIDCYvWdr9AoDEoqc8KKVU0eXJvZj1XaZPQDBBGoMif2Kn5hi/0u7deVidpNGsEFipiKXEOhIY9Z3prfQ1jdv/u3QWStrvUnyM/aLSeSFzizS+ipWDxwxRyE9OmavBguH1u2bsSv3EvcFkvjbVes/4ljBI9pBHuDRU/XiyvXGqQwJrgipzEj6E+3dLBs5QEymEyqrByAzjhnxnf27AgIpV1hzYdqY8GhCz0UxUR29X5pH07A468XM4gnDx/r2KYv0dwAx6jrybMZTxRp0BOePh4l+Gjji5IfiJdFUD89YgQO81puhx72qcvwXsMyFCRDE6PfAk0SkWy7/uzLE7MYcbE9iknGYG1Q/DSNzESO5KigSeNceyCg3ye+PMrAhoqEmDBRZlk4hzngisqMbUWQUtiXqY9o1dlGxc9vqVWzGLZeqKMG1MDdtTiosRbse87IMQZTAbyemojA+W7GK4qiwhKVZvMmdMtlTlpLidxZqSiDxEz8ECjX1xEJodpVvbDCqac5xAk3/VPdzwTFGYZAMJQFdxetBSBkpNfJkM8XOKpypWeGQA+wSjFYZjBHNc635rVw9iCbkT8SiH9SuwKRe+8U5oZrMSMK5y+Zjp/7/Fje9/SLhyxtzU/uND6z4ZLpuPonIAQ2TsSvtf7sZx0WzY7dgw== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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envelope-from=francisco.iglesias@amd.com; helo=NAM11-DM6-obe.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce a model of Xilinx Versal's Configuration Frame broadcast controller (CFRAME_BCAST_REG). Signed-off-by: Francisco Iglesias --- hw/misc/xlnx-versal-cframe-reg.c | 173 +++++++++++++++++++++++ include/hw/misc/xlnx-versal-cframe-reg.h | 17 +++ 2 files changed, 190 insertions(+) diff --git a/hw/misc/xlnx-versal-cframe-reg.c b/hw/misc/xlnx-versal-cframe-reg.c index 7e3420e14d..4f90eaa240 100644 --- a/hw/misc/xlnx-versal-cframe-reg.c +++ b/hw/misc/xlnx-versal-cframe-reg.c @@ -571,6 +571,104 @@ static const MemoryRegionOps cframe_reg_fdri_ops = { }, }; +static uint64_t cframes_bcast_reg_read(void *opaque, hwaddr addr, unsigned size) +{ + qemu_log_mask(LOG_GUEST_ERROR, "%s: Unsupported read from addr=%" + HWADDR_PRIx "\n", __func__, addr); + return 0; +} + +static void cframes_bcast_reg_write(void *opaque, hwaddr addr, uint64_t value, + unsigned size) +{ + XlnxVersalCFrameBcastReg *s = XLNX_VERSAL_CFRAME_BCAST_REG(opaque); + unsigned int idx; + + /* 4 32bit words. */ + idx = (addr >> 2) & 3; + + s->wfifo[idx] = value; + + /* Writing to the top word triggers the transmit onto CFI. */ + if (idx == 3) { + uint32_t reg_addr = extract32(addr, 4, 6); + XlnxCfiPacket pkt = { + .reg_addr = reg_addr, + .data[0] = s->wfifo[0], + .data[1] = s->wfifo[1], + .data[2] = s->wfifo[2], + .data[3] = s->wfifo[3] + }; + + for (int i = 0; i < ARRAY_SIZE(s->cfg.cframe); i++) { + if (s->cfg.cframe[i]) { + xlnx_cfi_transfer_packet(s->cfg.cframe[i], &pkt); + } + } + + memset(s->wfifo, 0, 4 * sizeof(uint32_t)); + } +} + +static uint64_t cframes_bcast_fdri_read(void *opaque, hwaddr addr, + unsigned size) +{ + qemu_log_mask(LOG_GUEST_ERROR, "%s: Unsupported read from addr=%" + HWADDR_PRIx "\n", __func__, addr); + return 0; +} + +static void cframes_bcast_fdri_write(void *opaque, hwaddr addr, uint64_t value, + unsigned size) +{ + XlnxVersalCFrameBcastReg *s = XLNX_VERSAL_CFRAME_BCAST_REG(opaque); + unsigned int idx; + + /* 4 32bit words. */ + idx = (addr >> 2) & 3; + + s->wfifo[idx] = value; + + /* Writing to the top word triggers the transmit onto CFI. */ + if (idx == 3) { + XlnxCfiPacket pkt = { + .reg_addr = CFRAME_FDRI, + .data[0] = s->wfifo[0], + .data[1] = s->wfifo[1], + .data[2] = s->wfifo[2], + .data[3] = s->wfifo[3] + }; + + for (int i = 0; i < ARRAY_SIZE(s->cfg.cframe); i++) { + if (s->cfg.cframe[i]) { + xlnx_cfi_transfer_packet(s->cfg.cframe[i], &pkt); + } + } + + memset(s->wfifo, 0, 4 * sizeof(uint32_t)); + } +} + +static const MemoryRegionOps cframes_bcast_reg_reg_ops = { + .read = cframes_bcast_reg_read, + .write = cframes_bcast_reg_write, + .endianness = DEVICE_LITTLE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, +}; + +static const MemoryRegionOps cframes_bcast_reg_fdri_ops = { + .read = cframes_bcast_fdri_read, + .write = cframes_bcast_fdri_write, + .endianness = DEVICE_LITTLE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, +}; + static void cframe_reg_realize(DeviceState *dev, Error **errp) { XlnxVersalCFrameReg *s = XLNX_VERSAL_CFRAME_REG(dev); @@ -680,6 +778,64 @@ static Property cframe_regs_props[] = { DEFINE_PROP_END_OF_LIST(), }; +static void cframe_bcast_reg_init(Object *obj) +{ + XlnxVersalCFrameBcastReg *s = XLNX_VERSAL_CFRAME_BCAST_REG(obj); + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + + memory_region_init_io(&s->iomem_reg, obj, &cframes_bcast_reg_reg_ops, s, + TYPE_XLNX_VERSAL_CFRAME_BCAST_REG, KEYHOLE_STREAM_4K); + memory_region_init_io(&s->iomem_fdri, obj, &cframes_bcast_reg_fdri_ops, s, + TYPE_XLNX_VERSAL_CFRAME_BCAST_REG "-fdri", + KEYHOLE_STREAM_4K); + sysbus_init_mmio(sbd, &s->iomem_reg); + sysbus_init_mmio(sbd, &s->iomem_fdri); +} + +static const VMStateDescription vmstate_cframe_bcast_reg = { + .name = TYPE_XLNX_VERSAL_CFRAME_BCAST_REG, + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32_ARRAY(wfifo, XlnxVersalCFrameBcastReg, 4), + VMSTATE_END_OF_LIST(), + } +}; + +static Property cframe_bcast_regs_props[] = { + DEFINE_PROP_LINK("cframe0", XlnxVersalCFrameBcastReg, cfg.cframe[0], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe1", XlnxVersalCFrameBcastReg, cfg.cframe[1], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe2", XlnxVersalCFrameBcastReg, cfg.cframe[2], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe3", XlnxVersalCFrameBcastReg, cfg.cframe[3], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe4", XlnxVersalCFrameBcastReg, cfg.cframe[4], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe5", XlnxVersalCFrameBcastReg, cfg.cframe[5], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe6", XlnxVersalCFrameBcastReg, cfg.cframe[6], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe7", XlnxVersalCFrameBcastReg, cfg.cframe[7], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe8", XlnxVersalCFrameBcastReg, cfg.cframe[8], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe9", XlnxVersalCFrameBcastReg, cfg.cframe[9], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe10", XlnxVersalCFrameBcastReg, cfg.cframe[10], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe11", XlnxVersalCFrameBcastReg, cfg.cframe[11], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe12", XlnxVersalCFrameBcastReg, cfg.cframe[12], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe13", XlnxVersalCFrameBcastReg, cfg.cframe[13], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_LINK("cframe14", XlnxVersalCFrameBcastReg, cfg.cframe[14], + TYPE_XLNX_CFI_IF, XlnxCfiIf *), + DEFINE_PROP_END_OF_LIST(), +}; + static void cframe_reg_class_init(ObjectClass *klass, void *data) { ResettableClass *rc = RESETTABLE_CLASS(klass); @@ -694,6 +850,14 @@ static void cframe_reg_class_init(ObjectClass *klass, void *data) xcic->cfi_transfer_packet = cframe_reg_cfi_transfer_packet; } +static void cframe_bcast_reg_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->vmsd = &vmstate_cframe_bcast_reg; + device_class_set_props(dc, cframe_bcast_regs_props); +} + static const TypeInfo cframe_reg_info = { .name = TYPE_XLNX_VERSAL_CFRAME_REG, .parent = TYPE_SYS_BUS_DEVICE, @@ -706,9 +870,18 @@ static const TypeInfo cframe_reg_info = { } }; +static const TypeInfo cframe_bcast_reg_info = { + .name = TYPE_XLNX_VERSAL_CFRAME_BCAST_REG, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(XlnxVersalCFrameBcastReg), + .class_init = cframe_bcast_reg_class_init, + .instance_init = cframe_bcast_reg_init, +}; + static void cframe_reg_register_types(void) { type_register_static(&cframe_reg_info); + type_register_static(&cframe_bcast_reg_info); } type_init(cframe_reg_register_types) diff --git a/include/hw/misc/xlnx-versal-cframe-reg.h b/include/hw/misc/xlnx-versal-cframe-reg.h index 07dd9ed3e4..c98d5d84f9 100644 --- a/include/hw/misc/xlnx-versal-cframe-reg.h +++ b/include/hw/misc/xlnx-versal-cframe-reg.h @@ -24,6 +24,10 @@ #define TYPE_XLNX_VERSAL_CFRAME_REG "xlnx,cframe-reg" OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalCFrameReg, XLNX_VERSAL_CFRAME_REG) +#define TYPE_XLNX_VERSAL_CFRAME_BCAST_REG "xlnx.cframe-bcast-reg" +OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalCFrameBcastReg, + XLNX_VERSAL_CFRAME_BCAST_REG) + /* * The registers in this module are 128 bits wide but it is ok to write * and read them through 4 sequential 32 bit accesses (address[3:2] = 0, @@ -285,4 +289,17 @@ struct XlnxVersalCFrameReg { bool row_configured; }; +struct XlnxVersalCFrameBcastReg { + SysBusDevice parent_obj; + MemoryRegion iomem_reg; + MemoryRegion iomem_fdri; + + /* 128-bit wfifo. */ + uint32_t wfifo[4]; + + struct { + XlnxCfiIf *cframe[15]; + } cfg; +}; + #endif