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Tue, 04 Jul 2023 07:50:30 -0700 (PDT) Received: from localhost.localdomain ([176.176.157.122]) by smtp.gmail.com with ESMTPSA id f1-20020a5d5681000000b0030647449730sm28783108wrv.74.2023.07.04.07.50.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Jul 2023 07:50:30 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , qemu-arm@nongnu.org, Peter Maydell , Paolo Bonzini , Mark Cave-Ayland , Sergey Kambalin , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 03/19] hw/timer/arm_timer: Move SP804 code around Date: Tue, 4 Jul 2023 16:49:56 +0200 Message-Id: <20230704145012.49870-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230704145012.49870-1-philmd@linaro.org> References: <20230704145012.49870-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Move sp804_properties[] and sp804_class_init() around with the rest of SP804 code code. What follows the "Integrator/CP timer module." is strictly ICP related. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/timer/arm_timer.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index 30a34a9a92..0e5d5d0f6d 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -309,6 +309,21 @@ static void sp804_realize(DeviceState *dev, Error **errp) s->timer[1]->irq = qemu_allocate_irq(sp804_set_irq, s, 1); } +static Property sp804_properties[] = { + DEFINE_PROP_UINT32("freq0", SP804State, freq0, 1000000), + DEFINE_PROP_UINT32("freq1", SP804State, freq1, 1000000), + DEFINE_PROP_END_OF_LIST(), +}; + +static void sp804_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *k = DEVICE_CLASS(klass); + + k->realize = sp804_realize; + device_class_set_props(k, sp804_properties); + k->vmsd = &vmstate_sp804; +} + /* Integrator/CP timer module. */ #define TYPE_INTEGRATOR_PIT "integrator_pit" @@ -380,21 +395,6 @@ static void icp_pit_init(Object *obj) save themselves. */ } -static Property sp804_properties[] = { - DEFINE_PROP_UINT32("freq0", SP804State, freq0, 1000000), - DEFINE_PROP_UINT32("freq1", SP804State, freq1, 1000000), - DEFINE_PROP_END_OF_LIST(), -}; - -static void sp804_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *k = DEVICE_CLASS(klass); - - k->realize = sp804_realize; - device_class_set_props(k, sp804_properties); - k->vmsd = &vmstate_sp804; -} - static const TypeInfo arm_timer_types[] = { { .name = TYPE_INTEGRATOR_PIT,