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Tue, 04 Jul 2023 07:51:32 -0700 (PDT) Received: from localhost.localdomain ([176.176.157.122]) by smtp.gmail.com with ESMTPSA id g5-20020adff405000000b003143cb109d5sm2883604wro.14.2023.07.04.07.51.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 04 Jul 2023 07:51:32 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , qemu-arm@nongnu.org, Peter Maydell , Paolo Bonzini , Mark Cave-Ayland , Sergey Kambalin , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 15/19] hw/timer/arm_timer: Fix misuse of SysBus IRQ in IntegratorPIT Date: Tue, 4 Jul 2023 16:50:08 +0200 Message-Id: <20230704145012.49870-16-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230704145012.49870-1-philmd@linaro.org> References: <20230704145012.49870-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org SysBus IRQ are *output* IRQs. As some sort of simplification to avoid to forward it, IntegratorPIT misuses it as ARM timer input IRQ. Fix that by using a simple IRQ forwarder handler. Note: sysbus_pass_irq() forwards GPIOs and IRQs from a container to an inner device but only work with an entire set of IRQs, so we can not use it here where we forward a single IRQ from each timer. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Acked-by: Richard Henderson --- hw/timer/arm_timer.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index f6bec28884..aae7f3cf9d 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -344,6 +344,7 @@ struct IntegratorPIT { MemoryRegion iomem; ArmTimer *timer[3]; qemu_irq irq_in[3]; + qemu_irq irq[3]; }; static uint64_t icp_pit_read(void *opaque, hwaddr offset, @@ -383,6 +384,13 @@ static const MemoryRegionOps icp_pit_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; +static void icp_pit_fwd_irq(void *opaque, int n, int level) +{ + IntegratorPIT *s = opaque; + + qemu_set_irq(s->irq[n], level); +} + static void icp_pit_init(Object *obj) { static const uint32_t tmr_freq[] = { @@ -394,9 +402,14 @@ static void icp_pit_init(Object *obj) IntegratorPIT *s = INTEGRATOR_PIT(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj); + qdev_init_gpio_in_named(DEVICE(obj), icp_pit_fwd_irq, + "timer-in", ARRAY_SIZE(s->timer)); + for (unsigned i = 0; i < ARRAY_SIZE(s->timer); i++) { s->timer[i] = arm_timer_new(tmr_freq[i], s->irq_in[i]); - sysbus_init_irq(dev, &s->irq_in[i]); + sysbus_init_irq(dev, &s->irq[i]); + sysbus_connect_irq(dev, i, + qdev_get_gpio_in_named(DEVICE(obj), "timer-in", i)); } memory_region_init_io(&s->iomem, obj, &icp_pit_ops, s,