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Mon, 26 Jun 2023 16:21:19 -0700 (PDT) Received: from m1x-phil.lan ([176.187.199.226]) by smtp.gmail.com with ESMTPSA id o10-20020a17090637ca00b00992025654c2sm393546ejc.150.2023.06.26.16.21.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 26 Jun 2023 16:21:19 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Bin Meng , Liu Zhiwei , =?utf-8?q?Alex_Benn=C3=A9e?= , Thomas Huth , Beraldo Leal , Alistair Francis , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Palmer Dabbelt , Wainer dos Santos Moschetta , Daniel Henrique Barboza , Weiwei Li , qemu-riscv@nongnu.org Subject: [PATCH 11/16] target/riscv: Move sysemu-specific debug files to target/riscv/sysemu/ Date: Tue, 27 Jun 2023 01:20:02 +0200 Message-Id: <20230626232007.8933-12-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230626232007.8933-1-philmd@linaro.org> References: <20230626232007.8933-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=philmd@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.h | 2 +- target/riscv/{ => sysemu}/debug.h | 0 target/riscv/cpu_helper.c | 2 +- target/riscv/{ => sysemu}/debug.c | 0 target/riscv/meson.build | 4 ---- target/riscv/sysemu/meson.build | 1 + 6 files changed, 3 insertions(+), 6 deletions(-) rename target/riscv/{ => sysemu}/debug.h (100%) rename target/riscv/{ => sysemu}/debug.c (100%) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 288df4c2b1..6908dc395c 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -89,7 +89,7 @@ typedef enum { #if !defined(CONFIG_USER_ONLY) #include "sysemu/pmp.h" -#include "debug.h" +#include "sysemu/debug.h" #endif #define RV_VLEN_MAX 1024 diff --git a/target/riscv/debug.h b/target/riscv/sysemu/debug.h similarity index 100% rename from target/riscv/debug.h rename to target/riscv/sysemu/debug.h diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index a1501fea76..88760248c0 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -32,7 +32,7 @@ #include "sysemu/cpu-timers.h" #endif #include "cpu_bits.h" -#include "debug.h" +#include "sysemu/debug.h" #include "tcg/oversized-guest.h" int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch) diff --git a/target/riscv/debug.c b/target/riscv/sysemu/debug.c similarity index 100% rename from target/riscv/debug.c rename to target/riscv/sysemu/debug.c diff --git a/target/riscv/meson.build b/target/riscv/meson.build index 8ef47f43f9..49cdcde679 100644 --- a/target/riscv/meson.build +++ b/target/riscv/meson.build @@ -8,10 +8,6 @@ riscv_ss.add(files( 'gdbstub.c', )) -riscv_system_ss.add(files( - 'debug.c', -)) - subdir('tcg') subdir('sysemu') diff --git a/target/riscv/sysemu/meson.build b/target/riscv/sysemu/meson.build index 5f8e1edcf2..33fec8f11e 100644 --- a/target/riscv/sysemu/meson.build +++ b/target/riscv/sysemu/meson.build @@ -1,5 +1,6 @@ riscv_system_ss.add(files( 'arch_dump.c', + 'debug.c', 'machine.c', 'monitor.c', 'pmp.c',