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Tue, 20 Jun 2023 04:08:26 -0700 (PDT) Received: from stoup.lan ([176.176.183.29]) by smtp.gmail.com with ESMTPSA id x17-20020a170906711100b009884f015a44sm1170687ejj.49.2023.06.20.04.08.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Jun 2023 04:08:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: berrange@redhat.com, qemu-ppc@nongnu.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH v3 18/37] crypto: Add aesdec_IMC Date: Tue, 20 Jun 2023 13:07:39 +0200 Message-Id: <20230620110758.787479-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230620110758.787479-1-richard.henderson@linaro.org> References: <20230620110758.787479-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add a primitive for InvMixColumns. Signed-off-by: Richard Henderson Acked-by: Daniel P. Berrangé --- host/include/generic/host/crypto/aes-round.h | 2 + include/crypto/aes-round.h | 18 ++++++ crypto/aes.c | 59 ++++++++++++++++++++ 3 files changed, 79 insertions(+) diff --git a/host/include/generic/host/crypto/aes-round.h b/host/include/generic/host/crypto/aes-round.h index 1b82afc629..335ec3f11e 100644 --- a/host/include/generic/host/crypto/aes-round.h +++ b/host/include/generic/host/crypto/aes-round.h @@ -15,6 +15,8 @@ void aesenc_SB_SR_AK_accel(AESState *, const AESState *, const AESState *, bool) QEMU_ERROR("unsupported accel"); +void aesdec_IMC_accel(AESState *, const AESState *, bool) + QEMU_ERROR("unsupported accel"); void aesdec_ISB_ISR_AK_accel(AESState *, const AESState *, const AESState *, bool) QEMU_ERROR("unsupported accel"); diff --git a/include/crypto/aes-round.h b/include/crypto/aes-round.h index df252ac76d..e1a9c24cca 100644 --- a/include/crypto/aes-round.h +++ b/include/crypto/aes-round.h @@ -59,6 +59,24 @@ static inline void aesenc_SB_SR_AK(AESState *r, const AESState *st, } } +/* + * Perform InvMixColumns. + */ + +void aesdec_IMC_gen(AESState *ret, const AESState *st); +void aesdec_IMC_genrev(AESState *ret, const AESState *st); + +static inline void aesdec_IMC(AESState *r, const AESState *st, bool be) +{ + if (HAVE_AES_ACCEL) { + aesdec_IMC_accel(r, st, be); + } else if (HOST_BIG_ENDIAN == be) { + aesdec_IMC_gen(r, st); + } else { + aesdec_IMC_genrev(r, st); + } +} + /* * Perform InvSubBytes + InvShiftRows + AddRoundKey. */ diff --git a/crypto/aes.c b/crypto/aes.c index d1ef4c19c2..31028609d6 100644 --- a/crypto/aes.c +++ b/crypto/aes.c @@ -1356,6 +1356,65 @@ void aesenc_SB_SR_AK_genrev(AESState *r, const AESState *s, const AESState *k) aesenc_SB_SR_AK_swap(r, s, k, true); } +/* + * Perform InvMixColumns. + */ +static inline void +aesdec_IMC_swap(AESState *r, const AESState *st, bool swap) +{ + int swap_b = swap * 0xf; + int swap_w = swap * 0x3; + bool be = HOST_BIG_ENDIAN ^ swap; + uint32_t t; + + /* Note that AES_imc is encoded for big-endian. */ + t = (AES_imc[st->b[swap_b ^ 0x0]][0] ^ + AES_imc[st->b[swap_b ^ 0x1]][1] ^ + AES_imc[st->b[swap_b ^ 0x2]][2] ^ + AES_imc[st->b[swap_b ^ 0x3]][3]); + if (!be) { + t = bswap32(t); + } + r->w[swap_w ^ 0] = t; + + t = (AES_imc[st->b[swap_b ^ 0x4]][0] ^ + AES_imc[st->b[swap_b ^ 0x5]][1] ^ + AES_imc[st->b[swap_b ^ 0x6]][2] ^ + AES_imc[st->b[swap_b ^ 0x7]][3]); + if (!be) { + t = bswap32(t); + } + r->w[swap_w ^ 1] = t; + + t = (AES_imc[st->b[swap_b ^ 0x8]][0] ^ + AES_imc[st->b[swap_b ^ 0x9]][1] ^ + AES_imc[st->b[swap_b ^ 0xA]][2] ^ + AES_imc[st->b[swap_b ^ 0xB]][3]); + if (!be) { + t = bswap32(t); + } + r->w[swap_w ^ 2] = t; + + t = (AES_imc[st->b[swap_b ^ 0xC]][0] ^ + AES_imc[st->b[swap_b ^ 0xD]][1] ^ + AES_imc[st->b[swap_b ^ 0xE]][2] ^ + AES_imc[st->b[swap_b ^ 0xF]][3]); + if (!be) { + t = bswap32(t); + } + r->w[swap_w ^ 3] = t; +} + +void aesdec_IMC_gen(AESState *r, const AESState *st) +{ + aesdec_IMC_swap(r, st, false); +} + +void aesdec_IMC_genrev(AESState *r, const AESState *st) +{ + aesdec_IMC_swap(r, st, true); +} + /* * Perform InvSubBytes + InvShiftRows + AddRoundKey. */