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[176.184.10.225]) by smtp.gmail.com with ESMTPSA id s1-20020adfea81000000b003111a9a8dbfsm11417924wrm.44.2023.06.19.08.43.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 19 Jun 2023 08:43:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH v3 01/34] target/arm/tcg: Remove CONFIG_TCG #ifdef'ry check Date: Mon, 19 Jun 2023 17:42:29 +0200 Message-Id: <20230619154302.80350-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230619154302.80350-1-philmd@linaro.org> References: <20230619154302.80350-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org CONFIG_TCG is always defined within target/arm/tcg/. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/tcg/cpu32.c | 4 +--- target/arm/tcg/m_helper.c | 6 ------ 2 files changed, 1 insertion(+), 9 deletions(-) diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c index 47d2e8e781..0672519b89 100644 --- a/target/arm/tcg/cpu32.c +++ b/target/arm/tcg/cpu32.c @@ -13,11 +13,9 @@ #include "hw/core/tcg-cpu-ops.h" #include "internals.h" #include "target/arm/idau.h" +#include "cpregs.h" #if !defined(CONFIG_USER_ONLY) #include "hw/boards.h" -#endif -#include "cpregs.h" -#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) #include "hw/intc/armv7m_nvic.h" #endif diff --git a/target/arm/tcg/m_helper.c b/target/arm/tcg/m_helper.c index 9cef70e5c9..0891acc29c 100644 --- a/target/arm/tcg/m_helper.c +++ b/target/arm/tcg/m_helper.c @@ -15,10 +15,8 @@ #include "qemu/bitops.h" #include "qemu/log.h" #include "exec/exec-all.h" -#ifdef CONFIG_TCG #include "exec/cpu_ldst.h" #include "semihosting/common-semi.h" -#endif #if !defined(CONFIG_USER_ONLY) #include "hw/intc/armv7m_nvic.h" #endif @@ -2345,11 +2343,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) qemu_log_mask(CPU_LOG_INT, "...handling as semihosting call 0x%x\n", env->regs[0]); -#ifdef CONFIG_TCG do_common_semihosting(cs); -#else - g_assert_not_reached(); -#endif env->regs[15] += env->thumb ? 2 : 4; return; case EXCP_BKPT: