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[85.226.240.245]) by smtp.gmail.com with ESMTPSA id d19-20020ac244d3000000b004f37b88eacfsm217043lfm.187.2023.06.08.08.16.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Jun 2023 08:16:26 -0700 (PDT) Received: by flawful.org (Postfix, from userid 112) id 40BED148C; Thu, 8 Jun 2023 17:16:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686237385; bh=a5SkxRTfz+p1TvOllAPLUVa9px3KY3l+AXj78TtaLFE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ixSXKW96olrnQ6/8QmhFMT5kkcFvGrFD2bFDxOMBiMoF90GcYESAcnaOceGznCDe3 6Pt6oTyr+N+6hLsLYEWl3x58Gz7v6TrxwSCrArSanCZzckz5E8JihPMvSWqdKaJUn/ WSOv0YkiXtyH2RtVpcEEvpRNVxxOFYUDaIESXEQQ= Received: from x1-carbon.wireless.wdc (unknown [129.253.182.60]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by flawful.org (Postfix) with ESMTPSA id EAFF212FF; Thu, 8 Jun 2023 17:15:54 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686237358; bh=a5SkxRTfz+p1TvOllAPLUVa9px3KY3l+AXj78TtaLFE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XyeTqJpRgCECiEMYrDfi+nGAOEO6RM1Gto3vr1gUH+DsODFDzB7a2Yu/FznEKFx+W 8/A8YIxUMh4YdXiHCgaNSK15BrVw5IozXeSO8gA1HUCcLOvRNwuQr4of5S85s7CjP+ +Lyy8zxxX9FMe/zNBU1spp8tMc0bxbURwfhFFwJo= From: Niklas Cassel To: John Snow Cc: qemu-block@nongnu.org, qemu-devel@nongnu.org, Damien Le Moal , Niklas Cassel Subject: [PATCH 3/5] libqos/ahci: simplify ahci_port_check_error() Date: Thu, 8 Jun 2023 17:15:26 +0200 Message-Id: <20230608151528.143950-4-nks@flawful.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230608151528.143950-1-nks@flawful.org> References: <20230608151528.143950-1-nks@flawful.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::131; envelope-from=nks.gnu@gmail.com; helo=mail-lf1-x131.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Niklas Cassel Modify ahci_port_check_error() to simply take a struct AHCICommand. This way, the conditionals are in line which the existing code, e.g. ahci_port_check_nonbusy(), which checks for cmd->errors. This makes the code easier to reason with, we don't want to use cmd->errors in some functions and emask in some functions. No functional changes intended. Signed-off-by: Niklas Cassel --- tests/qtest/libqos/ahci.c | 14 +++++++------- tests/qtest/libqos/ahci.h | 3 +-- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/tests/qtest/libqos/ahci.c b/tests/qtest/libqos/ahci.c index 2d4981dae4..644ed7e79f 100644 --- a/tests/qtest/libqos/ahci.c +++ b/tests/qtest/libqos/ahci.c @@ -404,14 +404,14 @@ void ahci_port_clear(AHCIQState *ahci, uint8_t port) /** * Check a port for errors. */ -void ahci_port_check_error(AHCIQState *ahci, uint8_t port, - uint32_t imask, uint8_t emask) +void ahci_port_check_error(AHCIQState *ahci, AHCICommand *cmd) { + uint8_t port = cmd->port; uint32_t reg; /* The upper 9 bits of the IS register all indicate errors. */ reg = ahci_px_rreg(ahci, port, AHCI_PX_IS); - reg &= ~imask; + reg &= ~cmd->interrupts; reg >>= 23; g_assert_cmphex(reg, ==, 0); @@ -421,13 +421,13 @@ void ahci_port_check_error(AHCIQState *ahci, uint8_t port, /* The TFD also has two error sections. */ reg = ahci_px_rreg(ahci, port, AHCI_PX_TFD); - if (!emask) { + if (!cmd->errors) { ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_STS_ERR); } else { ASSERT_BIT_SET(reg, AHCI_PX_TFD_STS_ERR); } - ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR & (~emask << 8)); - ASSERT_BIT_SET(reg, AHCI_PX_TFD_ERR & (emask << 8)); + ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR & (~cmd->errors << 8)); + ASSERT_BIT_SET(reg, AHCI_PX_TFD_ERR & (cmd->errors << 8)); } void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port, @@ -1242,7 +1242,7 @@ void ahci_command_verify(AHCIQState *ahci, AHCICommand *cmd) uint8_t slot = cmd->slot; uint8_t port = cmd->port; - ahci_port_check_error(ahci, port, cmd->interrupts, cmd->errors); + ahci_port_check_error(ahci, cmd); ahci_port_check_interrupts(ahci, port, cmd->interrupts); ahci_port_check_nonbusy(ahci, cmd); ahci_port_check_cmd_sanity(ahci, cmd); diff --git a/tests/qtest/libqos/ahci.h b/tests/qtest/libqos/ahci.h index 2234f46862..137858d79c 100644 --- a/tests/qtest/libqos/ahci.h +++ b/tests/qtest/libqos/ahci.h @@ -590,8 +590,7 @@ void ahci_set_command_header(AHCIQState *ahci, uint8_t port, void ahci_destroy_command(AHCIQState *ahci, uint8_t port, uint8_t slot); /* AHCI sanity check routines */ -void ahci_port_check_error(AHCIQState *ahci, uint8_t port, - uint32_t imask, uint8_t emask); +void ahci_port_check_error(AHCIQState *ahci, AHCICommand *cmd); void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port, uint32_t intr_mask); void ahci_port_check_nonbusy(AHCIQState *ahci, AHCICommand *cmd);