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[v2,1/4] target/ppc: Fix lqarx to set cpu_reserve

Message ID 20230605025445.161932-1-npiggin@gmail.com
State New
Headers show
Series [v2,1/4] target/ppc: Fix lqarx to set cpu_reserve | expand

Commit Message

Nicholas Piggin June 5, 2023, 2:54 a.m. UTC 
lqarx does not set cpu_reserve, which causes stqcx. to never succeed.

Cc: qemu-stable@nongnu.org
Fixes: 94bf2658676 ("target/ppc: Use atomic load for LQ and LQARX")
Fixes: 57b38ffd0c6 ("target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ, STQ")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
v2:
- Fix bugs vs memory access fault [Richard]

 target/ppc/translate.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Richard Henderson June 5, 2023, 3:09 a.m. UTC | #1 
On 6/4/23 19:54, Nicholas Piggin wrote:
> lqarx does not set cpu_reserve, which causes stqcx. to never succeed.
> 
> Cc:qemu-stable@nongnu.org
> Fixes: 94bf2658676 ("target/ppc: Use atomic load for LQ and LQARX")
> Fixes: 57b38ffd0c6 ("target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ, STQ")
> Signed-off-by: Nicholas Piggin<npiggin@gmail.com>
> ---
> v2:
> - Fix bugs vs memory access fault [Richard]
> 
>   target/ppc/translate.c | 1 +
>   1 file changed, 1 insertion(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
Daniel Henrique Barboza June 5, 2023, 1:42 p.m. UTC | #2 
On 6/4/23 23:54, Nicholas Piggin wrote:
> lqarx does not set cpu_reserve, which causes stqcx. to never succeed.
> 
> Cc: qemu-stable@nongnu.org
> Fixes: 94bf2658676 ("target/ppc: Use atomic load for LQ and LQARX")
> Fixes: 57b38ffd0c6 ("target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ, STQ")
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---

Queued. Thanks,


Daniel

> v2:
> - Fix bugs vs memory access fault [Richard]
> 
>   target/ppc/translate.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 3650d2985d..7a5bf1d820 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -3881,6 +3881,7 @@ static void gen_lqarx(DisasContext *ctx)
>       tcg_gen_qemu_ld_i128(t16, EA, ctx->mem_idx, DEF_MEMOP(MO_128 | MO_ALIGN));
>       tcg_gen_extr_i128_i64(lo, hi, t16);
>   
> +    tcg_gen_mov_tl(cpu_reserve, EA);
>       tcg_gen_st_tl(hi, cpu_env, offsetof(CPUPPCState, reserve_val));
>       tcg_gen_st_tl(lo, cpu_env, offsetof(CPUPPCState, reserve_val2));
>   }
diff mbox series

Patch

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 3650d2985d..7a5bf1d820 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -3881,6 +3881,7 @@  static void gen_lqarx(DisasContext *ctx)
     tcg_gen_qemu_ld_i128(t16, EA, ctx->mem_idx, DEF_MEMOP(MO_128 | MO_ALIGN));
     tcg_gen_extr_i128_i64(lo, hi, t16);
 
+    tcg_gen_mov_tl(cpu_reserve, EA);
     tcg_gen_st_tl(hi, cpu_env, offsetof(CPUPPCState, reserve_val));
     tcg_gen_st_tl(lo, cpu_env, offsetof(CPUPPCState, reserve_val2));
 }