From patchwork Wed May 31 08:43:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 1788182 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=fu8NaIJc; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QWN981lpBz20QD for ; Wed, 31 May 2023 18:44:12 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q4HQZ-00029f-Uc; Wed, 31 May 2023 04:43:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q4HQT-000276-Td for qemu-devel@nongnu.org; Wed, 31 May 2023 04:43:26 -0400 Received: from mga06b.intel.com ([134.134.136.31] helo=mga06.intel.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q4HQR-0005fZ-6c for qemu-devel@nongnu.org; Wed, 31 May 2023 04:43:25 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1685522603; x=1717058603; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PUiPWRxoJu35zk6JisuELImdtxTwEvzqb0+TEiNmcuc=; b=fu8NaIJcanO3fmYdkVGMR9CeleDETskL/G+g0vIAcCzkjFLvSTAlOe2i g14oZyP0NAdnUDMfww7riKZm3XgFVItSB6Eb+s6brWgEbrhIrgSPd1wkA maKUu2L2P2FQNr9yrrAHmjwy0O7bwxeKn5/QdC9vPkoprqqSyHCEPU7rf qK3uRaxs+4tyMIbWGtJsBatVW/OZlEdMIX5/DTSrhFUbR/Dl13tbQnS64 4CsA191jq2cULihy5ULjSvxnZYSXD8C84o9a6U2N+bES0EVGz5fIDuDkP UXx0xrmBoIZOB4YTnPccCb7PYW0FDLybF9FKvRbUFiwZ9Oc+kIv9rAokd g==; X-IronPort-AV: E=McAfee;i="6600,9927,10726"; a="418669250" X-IronPort-AV: E=Sophos;i="6.00,205,1681196400"; d="scan'208";a="418669250" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 May 2023 01:43:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10726"; a="1036956407" X-IronPort-AV: E=Sophos;i="6.00,205,1681196400"; d="scan'208";a="1036956407" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.46]) by fmsmga005.fm.intel.com with ESMTP; 31 May 2023 01:43:19 -0700 From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Chenyi Qiang , lei4.wang@intel.com Subject: [PATCH v4 2/8] target/i386/intel-pt: Fix INTEL_PT_ADDR_RANGES_NUM_MASK Date: Wed, 31 May 2023 04:43:05 -0400 Message-Id: <20230531084311.3807277-3-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230531084311.3807277-1-xiaoyao.li@intel.com> References: <20230531084311.3807277-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Received-SPF: pass client-ip=134.134.136.31; envelope-from=xiaoyao.li@intel.com; helo=mga06.intel.com X-Spam_score_int: -45 X-Spam_score: -4.6 X-Spam_bar: ---- X-Spam_report: (-4.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.167, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.001, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Per Intel SDM, bits 2:0 of CPUID(0x14,0x1).EAX indicate the number of address ranges for INTEL-PT. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 88e90c1f7b7c..7d2f20c84c7a 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -573,7 +573,7 @@ static CPUCacheInfo legacy_l3_cache = { /* generated packets which contain IP payloads have LIP values */ #define INTEL_PT_IP_LIP (1 << 31) #define INTEL_PT_ADDR_RANGES_NUM 0x2 /* Number of configurable address ranges */ -#define INTEL_PT_ADDR_RANGES_NUM_MASK 0x3 +#define INTEL_PT_ADDR_RANGES_NUM_MASK 0x7 #define INTEL_PT_MTC_BITMAP (0x0249 << 16) /* Support ART(0,3,6,9) */ #define INTEL_PT_CYCLE_BITMAP 0x1fff /* Support 0,2^(0~11) */ #define INTEL_PT_PSB_BITMAP (0x003f << 16) /* Support 2K,4K,8K,16K,32K,64K */