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[78.54.22.93]) by smtp.gmail.com with ESMTPSA id xj9-20020a170906db0900b009231714b3d4sm1293745ejb.151.2023.03.12.05.02.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 05:02:37 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , Paolo Bonzini , David Woodhouse , Anthony Perard , =?utf-8?q?Herv=C3=A9_Poussineau?= , Aurelien Jarno , Eduardo Habkost , Paul Durrant , xen-devel@lists.xenproject.org, "Michael S. Tsirkin" , Stefano Stabellini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Chuck Zmudzinski , Bernhard Beschow Subject: [PATCH v3 4/6] hw/isa/piix3: Avoid Xen-specific variant of piix3_write_config() Date: Sun, 12 Mar 2023 13:02:19 +0100 Message-Id: <20230312120221.99183-5-shentey@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230312120221.99183-1-shentey@gmail.com> References: <20230312120221.99183-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=shentey@gmail.com; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Subscribe to pci_bus_fire_intx_routing_notifier() instead which allows for having a common piix3_write_config() for the PIIX3 device models. While at it, move the subscription into machine code to facilitate resolving TYPE_PIIX3_XEN_DEVICE. In a possible future followup, pci_bus_fire_intx_routing_notifier() could be adjusted in such a way that subscribing to it doesn't require knowledge of the device firing it. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin --- hw/i386/pc_piix.c | 18 ++++++++++++++++++ hw/isa/piix3.c | 22 +--------------------- 2 files changed, 19 insertions(+), 21 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 99232701b1..1b70470dcd 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -88,6 +88,21 @@ static int pc_pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) return (pci_intx + slot_addend) & 3; } +static void piix_intx_routing_notifier_xen(PCIDevice *dev) +{ + int i; + + /* Scan for updates to PCI link routes (0x60-0x63). */ + for (i = 0; i < PIIX_NUM_PIRQS; i++) { + uint8_t v = dev->config_read(dev, PIIX_PIRQCA + i, 1); + if (v & 0x80) { + v = 0; + } + v &= 0xf; + xen_set_pci_link_route(i, v); + } +} + /* PC hardware initialisation */ static void pc_init1(MachineState *machine, const char *host_type, const char *pci_type) @@ -239,6 +254,9 @@ static void pc_init1(MachineState *machine, pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type); if (xen_enabled()) { + pci_device_set_intx_routing_notifier( + pci_dev, piix_intx_routing_notifier_xen); + /* * Xen supports additional interrupt routes from the PCI devices to * the IOAPIC: the four pins of each PCI device on the bus are also diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 7a31caf2b6..737f5c6a5d 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -121,26 +121,6 @@ static void piix3_write_config(PCIDevice *dev, } } -static void piix3_write_config_xen(PCIDevice *dev, - uint32_t address, uint32_t val, int len) -{ - int i; - - /* Scan for updates to PCI link routes (0x60-0x63). */ - for (i = 0; i < len; i++) { - uint8_t v = (val >> (8 * i)) & 0xff; - if (v & 0x80) { - v = 0; - } - v &= 0xf; - if (((address + i) >= PIIX_PIRQCA) && ((address + i) <= PIIX_PIRQCD)) { - xen_set_pci_link_route(address + i - PIIX_PIRQCA, v); - } - } - - piix3_write_config(dev, address, val, len); -} - static void piix3_reset(DeviceState *dev) { PIIX3State *d = PIIX3_PCI_DEVICE(dev); @@ -390,7 +370,7 @@ static void piix3_xen_class_init(ObjectClass *klass, void *data) { PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - k->config_write = piix3_write_config_xen; + k->config_write = piix3_write_config; k->realize = piix3_realize; }