| Message ID | 20230227135203.418404-1-robert.hu@linux.intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | i386: QEMU support LAM (Linear Address Masking) | expand |
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 4d2b8d0444..d6d573ca38 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -876,7 +876,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, + NULL, NULL, "lam", NULL, NULL, NULL, NULL, NULL, }, .cpuid = {
Define feature word "lam", so that QEMU can support this new feature. LAM is enumerated by CPUID(7,1).EAX[26], it allows to use upper bits of linear address for meta data storage. Analogous to ARM MTE, but more flexible. More info can be found ISE Chap10 https://cdrdv2.intel.com/v1/dl/getContent/671368 Signed-off-by: Robert Hoo <robert.hu@linux.intel.com> --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)