@@ -268,6 +268,12 @@ static void pegasos2_machine_reset(MachineState *machine, ShutdownCause reason)
PCI_INTERRUPT_LINE, 2, 0x9);
pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) |
0x50, 1, 0x2);
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) |
+ 0x55, 1, 0x90);
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) |
+ 0x56, 1, 0x99);
+ pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) |
+ 0x57, 1, 0x90);
pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) |
PCI_INTERRUPT_LINE, 2, 0x109);
The firmware of the real PegasosII board routes all PIRQx to IRQ9, so do the same in QEMU. The PCI_INTERRUPT_LINE registers of the respective internal PCI functions are already initialized with IRQ9 which are currently used for routing. Note that the PCI interrupt router isn't implemented yet in the VIA south bridges. This change has therefore no effect until this happens. Inspired-by: <c046d77c20875c8cd8bfdc79b4619a98ffd0bf33.1677004415.git.balaton@eik.bme.hu> ("hw/ppc/pegasos2: Fix PCI interrupt routing") Signed-off-by: Bernhard Beschow <shentey@gmail.com> --- hw/ppc/pegasos2.c | 6 ++++++ 1 file changed, 6 insertions(+)