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Wed, 15 Feb 2023 12:59:30 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([191.19.40.109]) by smtp.gmail.com with ESMTPSA id p125-20020acad883000000b003436fa2c23bsm7761563oig.7.2023.02.15.12.59.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Feb 2023 12:59:29 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, Christoph Muellner , Philipp Tomsich , Daniel Henrique Barboza Subject: [PATCH v5 4/4] target/riscv: add Zicbop cbo.prefetch{i, r, m} placeholder Date: Wed, 15 Feb 2023 17:59:11 -0300 Message-Id: <20230215205911.695745-5-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230215205911.695745-1-dbarboza@ventanamicro.com> References: <20230215205911.695745-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::234; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x234.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Christoph Muellner The cmo.prefetch instructions are nops for QEMU (no emulation of the memory hierarchy, no illegal instructions, no permission faults, no traps). Add a comment noting where they would be decoded in case cbo.prefetch instructions become relevant in the future. Co-developed-by: Philipp Tomsich Signed-off-by: Christoph Muellner Signed-off-by: Daniel Henrique Barboza Reviewed-by: Richard Henderson --- target/riscv/insn32.decode | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 3788f86528..1aebd37572 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -134,6 +134,7 @@ addi ............ ..... 000 ..... 0010011 @i slti ............ ..... 010 ..... 0010011 @i sltiu ............ ..... 011 ..... 0010011 @i xori ............ ..... 100 ..... 0010011 @i +# cbo.prefetch_{i,r,m} instructions are ori with rd=x0 and not decoded. ori ............ ..... 110 ..... 0010011 @i andi ............ ..... 111 ..... 0010011 @i slli 00000. ...... ..... 001 ..... 0010011 @sh