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Fri, 10 Feb 2023 08:38:06 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Sergio Lopez , Richard Henderson , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Philip?= =?utf-8?q?pe_Mathieu-Daud=C3=A9?= , Huacai Chen , Jiaxun Yang Subject: [PATCH 04/11] hw/isa/vt82c686: Remove intermediate IRQ forwarder Date: Fri, 10 Feb 2023 17:37:37 +0100 Message-Id: <20230210163744.32182-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230210163744.32182-1-philmd@linaro.org> References: <20230210163744.32182-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Philippe Mathieu-Daudé Directly dispatch ISA IRQs to 'cpu_intr' output IRQ by removing the intermediate via_isa_request_i8259_irq() handler. Rename ISA IRQs array as 'isa_irqs_in' to emphasize these are input IRQs. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- hw/isa/vt82c686.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 3f9bd0c04d..a913a509f7 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -548,7 +548,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(ViaISAState, VIA_ISA) struct ViaISAState { PCIDevice dev; qemu_irq cpu_intr; - qemu_irq *isa_irqs; + qemu_irq *isa_irqs_in; ViaSuperIOState via_sio; RTCState rtc; PCIIDEState ide; @@ -595,13 +595,7 @@ static const TypeInfo via_isa_info = { void via_isa_set_irq(PCIDevice *d, int n, int level) { ViaISAState *s = VIA_ISA(d); - qemu_set_irq(s->isa_irqs[n], level); -} - -static void via_isa_request_i8259_irq(void *opaque, int irq, int level) -{ - ViaISAState *s = opaque; - qemu_set_irq(s->cpu_intr, level); + qemu_set_irq(s->isa_irqs_in[n], level); } static void via_isa_realize(PCIDevice *d, Error **errp) @@ -609,12 +603,10 @@ static void via_isa_realize(PCIDevice *d, Error **errp) ViaISAState *s = VIA_ISA(d); DeviceState *dev = DEVICE(d); PCIBus *pci_bus = pci_get_bus(d); - qemu_irq *isa_irq; ISABus *isa_bus; int i; qdev_init_gpio_out(dev, &s->cpu_intr, 1); - isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1); isa_bus = isa_bus_new(dev, pci_address_space(d), pci_address_space_io(d), errp); @@ -622,8 +614,8 @@ static void via_isa_realize(PCIDevice *d, Error **errp) return; } - s->isa_irqs = i8259_init(isa_bus, *isa_irq); - isa_bus_irqs(isa_bus, s->isa_irqs); + s->isa_irqs_in = i8259_init(isa_bus, s->cpu_intr); + isa_bus_irqs(isa_bus, s->isa_irqs_in); i8254_pit_init(isa_bus, 0x40, 0, NULL); i8257_dma_init(isa_bus, 0);