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Mon, 06 Feb 2023 04:18:09 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland Subject: [PATCH 9/9] hw/arm/armv7m: Pass CPU/NVIC using object_property_add_const_link() Date: Mon, 6 Feb 2023 13:17:14 +0100 Message-Id: <20230206121714.85084-10-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230206121714.85084-1-philmd@linaro.org> References: <20230206121714.85084-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Avoid having QOM objects poke at each other internals. Instead, pass references using QOM link properties. Signed-off-by: Philippe Mathieu-Daudé --- Cc: Mark Cave-Ayland --- hw/arm/armv7m.c | 4 ++-- hw/intc/armv7m_nvic.c | 3 ++- target/arm/cpu.c | 3 ++- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 50a9507c0b..edde774da2 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -338,8 +338,8 @@ static void armv7m_realize(DeviceState *dev, Error **errp) * Tell the CPU where the NVIC is; it will fail realize if it doesn't * have one. Similarly, tell the NVIC where its CPU is. */ - s->cpu->env.nvic = &s->nvic; - s->nvic.cpu = s->cpu; + object_property_add_const_link(OBJECT(s->cpu), "nvic", OBJECT(&s->nvic)); + object_property_add_const_link(OBJECT(&s->nvic), "cpu", OBJECT(s->cpu)); if (!qdev_realize(DEVICE(s->cpu), NULL, errp)) { return; diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index d9c7e414bc..e43898a9e0 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -2668,7 +2668,8 @@ static void armv7m_nvic_realize(DeviceState *dev, Error **errp) NVICState *s = NVIC(dev); /* The armv7m container object will have set our CPU pointer */ - if (!s->cpu || !arm_feature(&s->cpu->env, ARM_FEATURE_M)) { + s->cpu = ARM_CPU(object_property_get_link(OBJECT(dev), "cpu", &error_abort)); + if (!arm_feature(&s->cpu->env, ARM_FEATURE_M)) { error_setg(errp, "The NVIC can only be used with a Cortex-M CPU"); return; } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 876ab8f3bf..f081861947 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1573,12 +1573,13 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) * error and will result in segfaults if not caught here. */ if (arm_feature(env, ARM_FEATURE_M)) { + env->nvic = NVIC(object_property_get_link(OBJECT(dev), "nvic", NULL)); if (!env->nvic) { error_setg(errp, "This board cannot be used with Cortex-M CPUs"); return; } } else { - if (env->nvic) { + if (object_property_find(OBJECT(dev), "nvic")) { error_setg(errp, "This board can only be used with Cortex-M CPUs"); return; }