| Message ID | 20230113140419.4013-17-farosas@suse.de |
|---|---|
| State | New |
| Headers | show |
| Series | target/arm: Allow CONFIG_TCG=n builds | expand |
On 13/1/23 15:04, Fabiano Rosas wrote: > This struct has no dependencies on TCG code and it is being used in > target/arm/ptw.c to simplify the passing around of page table walk > results. Those routines can be reached by KVM code via the gdbstub > breakpoint code, so take the structure out of CONFIG_TCG to make it > visible when building with --disable-tcg. > > Signed-off-by: Fabiano Rosas <farosas@suse.de> > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > --- > include/exec/cpu-defs.h | 6 ++++++ > 1 file changed, 6 insertions(+) Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 21309cf567..d5a4f30717 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -135,6 +135,10 @@ typedef struct CPUTLBEntry { QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1 << CPU_TLB_ENTRY_BITS)); + +#endif /* !CONFIG_USER_ONLY && CONFIG_TCG */ + +#if !defined(CONFIG_USER_ONLY) /* * The full TLB entry, which is not accessed by generated TCG code, * so the layout is not as critical as that of CPUTLBEntry. This is @@ -176,7 +180,9 @@ typedef struct CPUTLBEntryFull { TARGET_PAGE_ENTRY_EXTRA #endif } CPUTLBEntryFull; +#endif /* !CONFIG_USER_ONLY */ +#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) /* * Data elements that are per MMU mode, minus the bits accessed by * the TCG fast path.