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Fri, 30 Dec 2022 03:35:28 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Joel Stanley , Troy Lee , Beraldo Leal , Peter Maydell , Wainer dos Santos Moschetta , Andrew Jeffery , Chin-Ting Kuo , Peter Delevoryas , Steven Lee , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Jamin Lin , Peter Delevoryas , Peter Delevoryas , qemu-arm@nongnu.org, =?utf-8?q?C=C3=A9dri?= =?utf-8?q?c_Le_Goater?= , Cleber Rosa Subject: [PATCH v2 04/11] hw/arm/aspeed: Use the IEC binary prefix definitions Date: Fri, 30 Dec 2022 12:34:57 +0100 Message-Id: <20221230113504.37032-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221230113504.37032-1-philmd@linaro.org> References: <20221230113504.37032-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org IEC binary prefixes ease code review: the unit is explicit. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Delevoryas Reviewed-by: Cédric Le Goater --- hw/arm/aspeed_ast10x0.c | 3 ++- hw/arm/aspeed_ast2600.c | 3 ++- hw/arm/aspeed_soc.c | 4 ++-- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index 122b3fd3f3..3500294df7 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -10,6 +10,7 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" #include "qapi/error.h" #include "exec/address-spaces.h" #include "sysemu/sysemu.h" @@ -348,7 +349,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass *klass, void *data) sc->name = "ast1030-a1"; sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4"); sc->silicon_rev = AST1030_A1_SILICON_REV; - sc->sram_size = 0xc0000; + sc->sram_size = 768 * KiB; sc->spis_num = 2; sc->ehcis_num = 0; sc->wdts_num = 4; diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index a79e05ddbd..72df72a540 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -8,6 +8,7 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" #include "qapi/error.h" #include "hw/misc/unimp.h" #include "hw/arm/aspeed_soc.h" @@ -619,7 +620,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data) sc->name = "ast2600-a3"; sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"); sc->silicon_rev = AST2600_A3_SILICON_REV; - sc->sram_size = 0x16400; + sc->sram_size = 89 * KiB; sc->spis_num = 2; sc->ehcis_num = 2; sc->wdts_num = 4; diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 2c0924d311..677342c9ed 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -517,7 +517,7 @@ static void aspeed_soc_ast2400_class_init(ObjectClass *oc, void *data) sc->name = "ast2400-a1"; sc->cpu_type = ARM_CPU_TYPE_NAME("arm926"); sc->silicon_rev = AST2400_A1_SILICON_REV; - sc->sram_size = 0x8000; + sc->sram_size = 32 * KiB; sc->spis_num = 1; sc->ehcis_num = 1; sc->wdts_num = 2; @@ -544,7 +544,7 @@ static void aspeed_soc_ast2500_class_init(ObjectClass *oc, void *data) sc->name = "ast2500-a1"; sc->cpu_type = ARM_CPU_TYPE_NAME("arm1176"); sc->silicon_rev = AST2500_A1_SILICON_REV; - sc->sram_size = 0x9000; + sc->sram_size = 36 * KiB; sc->spis_num = 2; sc->ehcis_num = 2; sc->wdts_num = 3;