From patchwork Tue Nov 1 14:55:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 1697842 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=daynix-com.20210112.gappssmtp.com header.i=@daynix-com.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=bAWiqJdq; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N1xWM29kXz23lf for ; Wed, 2 Nov 2022 04:16:15 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1opshc-000727-IJ; Tue, 01 Nov 2022 10:57:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1opshZ-00070C-A4 for qemu-devel@nongnu.org; Tue, 01 Nov 2022 10:57:17 -0400 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1opshX-0003iS-Et for qemu-devel@nongnu.org; Tue, 01 Nov 2022 10:57:16 -0400 Received: by mail-pf1-x430.google.com with SMTP id b185so13680280pfb.9 for ; Tue, 01 Nov 2022 07:57:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ve64Yknp9Z5jtrd7y/2CScvNeMugfa6S0tD/94xCa3A=; b=bAWiqJdqIgjLtNbnpm3kBUlGN/ls+F/6Th3SLwjv7Fh6sSvp/tTD/lTwIjSPrkFGKM BN35tSPLicLsLI5rS3m1pdUneTlAJLF1/xgAH3BRLGEWFzYlJlYyCMPBJ9X6dnQuo9oy Wnt2sgnhggJAjRFCXXDdJ84t5McEaG1D6L8zGPicoJLr2V4L18afLGmjF+GYr892d8rR VKWE6V43GwN0/gLQQ216JRK/nGYcjuWg3PLxpSX2LGTTeswooKeYt2E0AZZMQ7ldmCsA TcqbUiIDuigVkq4T1yhCDn0ESaM5qW3+zIq809/GLR7LcB9KJHhzvqRfvNzlLoyUjIoH f8xQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ve64Yknp9Z5jtrd7y/2CScvNeMugfa6S0tD/94xCa3A=; b=u8In0bDqbxHYkWMbRg4KaECoirUbl0FT+8LHQRWroht8E95gGzadGVMyByqOxIoobB Vn40DOhER4szLBlYmliCteeJP8Qvz3sfcEUePrjXmTB54bpE3IKprfU5uRr0pIdRmLVe KjeYwdjxdQ302M3Jn3B5BSSf4PCN0PmVjPS1PyjDaKrGKhWDUeyZGKXgj3lYjawAMlZ6 qwGp73KCuLxzVFtmrohPeLE0GWYThZ6Bah8nz3b5QyCCxIv734vTW6/ihzP4B2Bhfls9 L42XDLiooiN+uKhE5oJThrK1XL9NCdbhiqCbwN+XMfv3QgmZ6/v/LyF0n77cwDDVVMLm p4SA== X-Gm-Message-State: ACrzQf1NSdKDpH2pZWFGNhb1guVG4XzVmHUnyl3zeO1f9rVf3haBx3ae 6oL24AHjHb2l4wcgYccHnr2VYSGd743QMkwB X-Google-Smtp-Source: AMsMyM68qVKcnntMG2mhyZo3Jtbd8W2WVdI2T3kv0pEpqo3F+7kt0hm0FeLH6Ofl9+3hhwOJflhaAA== X-Received: by 2002:a63:ea41:0:b0:439:19f:d0da with SMTP id l1-20020a63ea41000000b00439019fd0damr148865pgk.232.1667314633795; Tue, 01 Nov 2022 07:57:13 -0700 (PDT) Received: from fedora.flets-east.jp ([2400:4050:c360:8200:8ae8:3c4:c0da:7419]) by smtp.gmail.com with ESMTPSA id 22-20020a631656000000b0046f9f4a2de6sm4783219pgw.74.2022.11.01.07.57.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Nov 2022 07:57:13 -0700 (PDT) From: Akihiko Odaki To: Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, "Michael S . Tsirkin" , Marcel Apfelbaum , Gerd Hoffmann , Paolo Bonzini , Richard Henderson , Eduardo Habkost , John Snow , Dmitry Fleytman , Jason Wang , Stefan Weil , Keith Busch , Klaus Jensen , Peter Maydell , Andrey Smirnov , Paul Burton , Aleksandar Rikalo , Yan Vugenfirer , Yuri Benditovich , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= , Akihiko Odaki Subject: [PATCH v9 12/17] msix: Omit errp for pci_add_capability Date: Tue, 1 Nov 2022 23:55:53 +0900 Message-Id: <20221101145558.3998-13-akihiko.odaki@daynix.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221101145558.3998-1-akihiko.odaki@daynix.com> References: <20221101145558.3998-1-akihiko.odaki@daynix.com> MIME-Version: 1.0 Received-SPF: none client-ip=2607:f8b0:4864:20::430; envelope-from=akihiko.odaki@daynix.com; helo=mail-pf1-x430.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Omitting errp for pci_add_capability() causes it to abort if capabilities overlap. A caller of msix_init(), which calls pci_add_capability() in turn, is expected to ensure that will not happen. Signed-off-by: Akihiko Odaki --- hw/pci/msix.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/hw/pci/msix.c b/hw/pci/msix.c index 1e381a9813..28af83403b 100644 --- a/hw/pci/msix.c +++ b/hw/pci/msix.c @@ -311,7 +311,7 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries, uint8_t pba_bar_nr, unsigned pba_offset, uint8_t cap_pos, Error **errp) { - int cap; + uint8_t cap; unsigned table_size, pba_size; uint8_t *config; @@ -340,11 +340,7 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries, return -EINVAL; } - cap = pci_add_capability(dev, PCI_CAP_ID_MSIX, - cap_pos, MSIX_CAP_LENGTH, errp); - if (cap < 0) { - return cap; - } + cap = pci_add_capability(dev, PCI_CAP_ID_MSIX, cap_pos, MSIX_CAP_LENGTH); dev->msix_cap = cap; dev->cap_present |= QEMU_PCI_CAP_MSIX;