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Mon, 31 Oct 2022 09:25:40 -0400 (EDT) From: Jiaxun Yang To: qemu-devel@nongnu.org Cc: f4bug@amsat.org, pavel.dovgalyuk@ispras.ru, Jiaxun Yang , Richard Henderson Subject: [PATCH v2 1/3] target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F Date: Mon, 31 Oct 2022 13:25:29 +0000 Message-Id: <20221031132531.18122-2-jiaxun.yang@flygoat.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221031132531.18122-1-jiaxun.yang@flygoat.com> References: <20221031132531.18122-1-jiaxun.yang@flygoat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=66.111.4.26; envelope-from=jiaxun.yang@flygoat.com; helo=out2-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org+incoming=patchwork.ozlabs.org@nongnu.org As per an unpublished document, in later reversion of chips CP0St_{KX, SX, UX} is not writeable and hardcoded to 1. Without those bits set, kernel is unable to access XKPHYS address segmant. So just set them up on CPU reset. Signed-off-by: Jiaxun Yang Acked-by: Richard Henderson --- v2: Rewording to point out the document is unpublished --- target/mips/cpu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index d0a76b95f7..a870901bfa 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -304,6 +304,12 @@ static void mips_cpu_reset(DeviceState *dev) env->CP0_EntryHi_ASID_mask = (env->CP0_Config5 & (1 << CP0C5_MI)) ? 0x0 : (env->CP0_Config4 & (1 << CP0C4_AE)) ? 0x3ff : 0xff; env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL); + if (env->insn_flags & INSN_LOONGSON2F) { + /* Loongson-2F has those bits hardcoded to 1 */ + env->CP0_Status |= (1 << CP0St_KX) | (1 << CP0St_SX) | + (1 << CP0St_UX); + } + /* * Vectored interrupts not implemented, timer on int 7, * no performance counters.