From patchwork Fri Oct 28 12:26:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 1696040 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=daynix-com.20210112.gappssmtp.com header.i=@daynix-com.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=r7iHbvoY; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MzMMM4y3Mz20S2 for ; Fri, 28 Oct 2022 23:30:22 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ooOTN-0004Lz-2n; Fri, 28 Oct 2022 08:28:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ooOSJ-0002u8-M1 for qemu-devel@nongnu.org; Fri, 28 Oct 2022 08:27:36 -0400 Received: from mail-pf1-x431.google.com ([2607:f8b0:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ooOSF-0003Gw-Ee for qemu-devel@nongnu.org; Fri, 28 Oct 2022 08:27:20 -0400 Received: by mail-pf1-x431.google.com with SMTP id i3so4644700pfc.11 for ; Fri, 28 Oct 2022 05:27:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6T08FDbNNqEO12Zwu/jhonyIkuoJ+EhaugR2jE60b2U=; b=r7iHbvoYfpgJFY0uS+xt/UWMubLSvJJa5fQaEY5F8lAIKsQfTZFW7B1qvQ3iIaDQoK ORsxEWGGDXzgu/qKoZKDcJPDVmy3UXx5sA+i+LGcN+YCg6JBPU+hdwo4jOXcF02Z460g h6Oe7fXGCdBZzuMtYaE9g1WuSc80r1oX0MfT4aJhMnqJNCK5a2e/JohAyQIfw/Sc5oC0 VDsQBn6ufN3nifmcekHFthpRNIFRrBhpFeiW+MPDAtsBMXVDDI933GNryZHTjk8GbVfQ zvw8wY0xmpi1Zd9Ojaa/N4zvZ4oNaBTrQ1rpM0GAJ8lfRN1nS1o5PEw0C0W2BImtatDU drmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6T08FDbNNqEO12Zwu/jhonyIkuoJ+EhaugR2jE60b2U=; b=TTj5Dbs4YlBw/XNL8mAFiVzSMvCB+FFkT4R2hn0KzbmoI4+VdI801x/3lebfcHfRm1 wt3suBQdSacwotwI9gS+4vOJUkYYjv/sVMlUZoWgmHGz0F6NHirdiHNrSVp3aGmF0gX0 cAZgjTgkzGeHnzQE0N2RizKzCgpRsBywVX7HtUdzIrqzqcQ9gD4xEb0/1D5se1XCIea0 hMBot/WVn+gFN9VX80aOTyIzrFzaGYOSTBcQA20gqCfv0X6g6SnZIk0PMqTb/wyOfZil VJSL++ythSqSNs/qJI5ZRNVIpCoWaNnxZZa7UuoAtRtKee3brkiBEHx+Vxe73ef9D1DT jLdw== X-Gm-Message-State: ACrzQf1kyI9nXQXZXs4U+kucHSy26AuZWEClPR0lEj20FYWLOIvY7G2h GXp+0HHlRoZ9Tzh8Pr7Ri+J0Bg== X-Google-Smtp-Source: AMsMyM7sy+zFiEaDjWNj4WI9gWGjqewlo18n43vZCA3N3X8/EM8fssBV4PduipeIrmeSjb5WXIL+1Q== X-Received: by 2002:a63:90c7:0:b0:46e:c7be:16e1 with SMTP id a190-20020a6390c7000000b0046ec7be16e1mr11895818pge.296.1666960038281; Fri, 28 Oct 2022 05:27:18 -0700 (PDT) Received: from fedora.flets-east.jp ([2400:4050:c360:8200:8ae8:3c4:c0da:7419]) by smtp.gmail.com with ESMTPSA id x3-20020a170902ec8300b00174d9bbeda4sm2948456plg.197.2022.10.28.05.27.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 05:27:17 -0700 (PDT) From: Akihiko Odaki To: Cc: Alex Williamson , qemu-devel@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, "Michael S . Tsirkin" , Marcel Apfelbaum , Gerd Hoffmann , Paolo Bonzini , Richard Henderson , Eduardo Habkost , John Snow , Dmitry Fleytman , Jason Wang , Stefan Weil , Keith Busch , Klaus Jensen , Peter Maydell , Andrey Smirnov , Paul Burton , Aleksandar Rikalo , Yan Vugenfirer , Yuri Benditovich , Akihiko Odaki Subject: [PATCH v5 07/17] hw/nvme: Omit errp for pci_add_capability Date: Fri, 28 Oct 2022 21:26:19 +0900 Message-Id: <20221028122629.3269-8-akihiko.odaki@daynix.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221028122629.3269-1-akihiko.odaki@daynix.com> References: <20221028122629.3269-1-akihiko.odaki@daynix.com> MIME-Version: 1.0 Received-SPF: none client-ip=2607:f8b0:4864:20::431; envelope-from=akihiko.odaki@daynix.com; helo=mail-pf1-x431.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Omitting errp for pci_add_capability() causes it to abort if capabilities overlap. This behavior is appropriate here because all of the capabilities set in this device are defined in the program and their overlap should not happen unless there is a programming error. Signed-off-by: Akihiko Odaki --- hw/nvme/ctrl.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 87aeba0564..ff4e2beea6 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -7325,17 +7325,9 @@ static void nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset) PCI_BASE_ADDRESS_MEM_TYPE_64, bar_size); } -static int nvme_add_pm_capability(PCIDevice *pci_dev, uint8_t offset) +static void nvme_add_pm_capability(PCIDevice *pci_dev, uint8_t offset) { - Error *err = NULL; - int ret; - - ret = pci_add_capability(pci_dev, PCI_CAP_ID_PM, offset, - PCI_PM_SIZEOF, &err); - if (err) { - error_report_err(err); - return ret; - } + pci_add_capability(pci_dev, PCI_CAP_ID_PM, offset, PCI_PM_SIZEOF); pci_set_word(pci_dev->config + offset + PCI_PM_PMC, PCI_PM_CAP_VER_1_2); @@ -7343,8 +7335,6 @@ static int nvme_add_pm_capability(PCIDevice *pci_dev, uint8_t offset) PCI_PM_CTRL_NO_SOFT_RESET); pci_set_word(pci_dev->wmask + offset + PCI_PM_CTRL, PCI_PM_CTRL_STATE_MASK); - - return 0; } static int nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp)