Message ID | 20220630112411.1474431-1-clg@kaod.org |
---|---|
State | New |
Headers | show |
On 6/30/22 16:53, Cédric Le Goater wrote: > The following changes since commit 621745c4f349ac09b72706c46febee983abca916: > > Merge tag 'trivial-branch-for-7.1-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging (2022-06-30 04:49:40 +0530) > > are available in the Git repository at: > > https://github.com/legoater/qemu/ tags/pull-aspeed-20220630 > > for you to fetch changes up to 55c57023b740c29151d42600af9ac43ba00e56cc: > > hw/misc/aspeed: Add PECI controller (2022-06-30 09:21:14 +0200) > > ---------------------------------------------------------------- > aspeed queue: > > * m25p80 improvements (Iris) > * Code cleanup in preparation of multi SoC machine (Peter) > * New MAX31785 model (Mahesh) > * New Qualcomm machines (Jae and Graeme) > * Core I2C slave mode (Klaus) > * Aspeed I2C slave mode for old and new register interface (Peter and Klaus) > * New Aspeed PECI model (Peter) > * Various small fixes Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/7.1 as appropriate. r~ > > ---------------------------------------------------------------- > Cédric Le Goater (4): > aspeed: Set the dram container at the SoC level > aspeed/scu: Add trace events for read ops > aspeed/i2c: Change trace event for NORMAL_STOP states > aspeed/smc: Fix potential overflow > > Graeme Gregory (1): > hw/arm/aspeed: add Qualcomm Firework BMC machine > > Iris Chen (2): > hw: m25p80: add WP# pin and SRWD bit for write protection > hw: m25p80: add tests for write protect (WP# and SRWD bit) > > Jae Hyun Yoo (2): > hw/arm/aspeed: add support for the Qualcomm DC-SCM v1 board > hw/arm/aspeed: firework: add I2C MUXes for VR channels > > Joel Stanley (1): > aspeed/hace: Accumulative mode supported > > Klaus Jensen (3): > hw/i2c: support multiple masters > hw/i2c: add asynchronous send > hw/i2c/aspeed: add slave device in old register mode > > Maheswara Kurapati (4): > hw/i2c: pmbus: Page #255 is valid page for read requests. > hw/sensor: add Maxim MAX31785 device > hw/arm/aspeed: Add MAX31785 Fan controllers > hw/arm/aspeed: firework: Add Thermal Diodes > > Peter Delevoryas (10): > aspeed: Set CPU memory property explicitly > aspeed: Add memory property to Aspeed SoC > aspeed: Remove usage of sysbus_mmio_map > aspeed: Map unimplemented devices in SoC memory > aspeed: Remove use of qemu_get_cpu > hw/i2c/aspeed: Fix R_I2CD_FUN_CTRL reference > hw/i2c/aspeed: Fix DMA len write-enable bit handling > hw/i2c/aspeed: Fix MASTER_EN missing error message > hw/i2c/aspeed: Add new-registers DMA slave mode RX support > hw/misc/aspeed: Add PECI controller > > include/hw/arm/aspeed_soc.h | 16 ++ > include/hw/i2c/aspeed_i2c.h | 11 + > include/hw/i2c/i2c.h | 30 +++ > include/hw/misc/aspeed_peci.h | 29 +++ > hw/arm/aspeed.c | 136 +++++++--- > hw/arm/aspeed_ast10x0.c | 59 +++-- > hw/arm/aspeed_ast2600.c | 104 +++++--- > hw/arm/aspeed_soc.c | 143 ++++++++--- > hw/arm/pxa2xx.c | 2 + > hw/block/m25p80.c | 82 ++++-- > hw/display/sii9022.c | 2 + > hw/display/ssd0303.c | 2 + > hw/i2c/aspeed_i2c.c | 236 ++++++++++++++--- > hw/i2c/core.c | 70 +++++- > hw/i2c/pmbus_device.c | 6 +- > hw/i2c/smbus_slave.c | 4 + > hw/misc/aspeed_hace.c | 6 +- > hw/misc/aspeed_peci.c | 152 +++++++++++ > hw/misc/aspeed_scu.c | 2 + > hw/nvram/eeprom_at24c.c | 2 + > hw/sensor/lsm303dlhc_mag.c | 2 + > hw/sensor/max31785.c | 573 ++++++++++++++++++++++++++++++++++++++++++ > hw/ssi/aspeed_smc.c | 4 +- > tests/qtest/aspeed_smc-test.c | 62 +++++ > hw/arm/Kconfig | 2 + > hw/i2c/trace-events | 2 + > hw/misc/meson.build | 3 +- > hw/misc/trace-events | 6 + > hw/sensor/Kconfig | 4 + > hw/sensor/meson.build | 1 + > 30 files changed, 1573 insertions(+), 180 deletions(-) > create mode 100644 include/hw/misc/aspeed_peci.h > create mode 100644 hw/misc/aspeed_peci.c > create mode 100644 hw/sensor/max31785.c