From patchwork Mon Jun 27 22:27:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Delevoryas X-Patchwork-Id: 1649120 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=fb.com header.i=@fb.com header.a=rsa-sha256 header.s=facebook header.b=SLkSs64E; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LX2bs310Cz9sGT for ; Tue, 28 Jun 2022 08:35:04 +1000 (AEST) Received: from localhost ([::1]:41930 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o5xJs-0003LT-2N for incoming@patchwork.ozlabs.org; Mon, 27 Jun 2022 18:35:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44232) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o5xHR-0003Is-CP for qemu-devel@nongnu.org; Mon, 27 Jun 2022 18:32:31 -0400 Received: from mx0b-00082601.pphosted.com ([67.231.153.30]:18502 helo=mx0a-00082601.pphosted.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o5xHD-0006TX-GX for qemu-devel@nongnu.org; Mon, 27 Jun 2022 18:32:27 -0400 Received: from pps.filterd (m0001303.ppops.net [127.0.0.1]) by m0001303.ppops.net (8.17.1.5/8.17.1.5) with ESMTP id 25RJ1QEL018645 for ; Mon, 27 Jun 2022 15:32:10 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fb.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : content-type : content-transfer-encoding : mime-version; s=facebook; bh=gccUFSTo96dsG615Bu1uuwt3K7S8tUa8Hwp9OxZ4RAo=; b=SLkSs64EuL7iTJdVwan4K8HJkfIE0vFa4SmBpNlRDunQJ+FmP/ZWJ2gPKkbOjm3WejNe IuzDEO99FeMrSY0FHErfKv0+z+dFv/1HpV1ZMcXTtoNBz8k2vfrjCUi5T1cxtlU2stKL +UdGqSuJFOLxlEQWMdNvpVmjwudLzuVfU0E= Received: from mail.thefacebook.com ([163.114.132.120]) by m0001303.ppops.net (PPS) with ESMTPS id 3gwx1v64jp-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Mon, 27 Jun 2022 15:32:10 -0700 Received: from twshared18443.03.prn6.facebook.com (2620:10d:c085:208::f) by mail.thefacebook.com (2620:10d:c085:11d::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Mon, 27 Jun 2022 15:32:08 -0700 Received: by devvm9194.prn0.facebook.com (Postfix, from userid 385188) id 9DD3A8D319B8; Mon, 27 Jun 2022 15:32:04 -0700 (PDT) From: Peter Delevoryas To: CC: , , Peter Delevoryas Subject: [PATCH 12/14] hw/misc: Add intel-me Date: Mon, 27 Jun 2022 15:27:35 -0700 Message-ID: <20220627222737.1011989-1-pdel@fb.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220627195506.403715-1-pdel@fb.com> References: <20220627195506.403715-1-pdel@fb.com> X-FB-Internal: Safe X-Proofpoint-ORIG-GUID: 2m-w1EHh3A50TZjjuerLx96b2w2ISbTC X-Proofpoint-GUID: 2m-w1EHh3A50TZjjuerLx96b2w2ISbTC X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-06-27_06,2022-06-24_01,2022-06-22_01 Received-SPF: pass client-ip=67.231.153.30; envelope-from=prvs=71779173e5=pdel@fb.com; helo=mx0a-00082601.pphosted.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Peter Delevoryas --- hw/arm/aspeed.c | 1 + hw/misc/intel_me.c | 176 ++++++++++++++++++++++++++++++++++++++++++++ hw/misc/meson.build | 3 +- 3 files changed, 179 insertions(+), 1 deletion(-) create mode 100644 hw/misc/intel_me.c diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 2b9c1600c6..88e9a47dc2 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -1447,6 +1447,7 @@ static void oby35_cl_i2c_init(AspeedMachineState *bmc) i2c_slave_create_simple(i2c[1], "tmp105", 0x4a); i2c_slave_create_simple(i2c[1], "adm1272", 0x40); i2c_slave_create_simple(i2c[1], "tmp421", 0x4c); + i2c_slave_create_simple(i2c[2], "intel-me", 0x16); i2c_slave_create_simple(i2c[4], "isl69259", 0x76); i2c_slave_create_simple(i2c[4], "isl69259", 0x62); i2c_slave_create_simple(i2c[4], "isl69259", 0x60); diff --git a/hw/misc/intel_me.c b/hw/misc/intel_me.c new file mode 100644 index 0000000000..fdc9180c26 --- /dev/null +++ b/hw/misc/intel_me.c @@ -0,0 +1,176 @@ +/* + * Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "qemu/main-loop.h" +#include "hw/i2c/i2c.h" + +#define TYPE_INTEL_ME "intel-me" +OBJECT_DECLARE_SIMPLE_TYPE(IntelMEState, INTEL_ME); + +#define printf(...) + +struct IntelMEState { + I2CSlave parent_obj; + + I2CBus *bus; + QEMUBH *bh; + int rx_len; + int tx_len; + int tx_pos; + uint8_t rx_buf[512]; + uint8_t tx_buf[512]; +}; + +static void intel_me_bh(void *opaque) +{ + IntelMEState *s = opaque; + + assert(s->bus->bh == s->bh); + + if (s->tx_pos == 0) { + if (i2c_start_send_async(s->bus, s->tx_buf[s->tx_pos++]) != 0) { + goto done; + } + return; + } + + if (s->tx_pos < s->tx_len) { + if (i2c_send_async(s->bus, s->tx_buf[s->tx_pos++]) != 0) { + goto done; + } + return; + } + +done: + i2c_end_transfer(s->bus); + i2c_bus_release(s->bus); + s->tx_len = 0; + s->tx_pos = 0; + memset(s->tx_buf, 0, sizeof(s->tx_buf)); +} + +static void intel_me_realize(DeviceState *dev, Error **errp) +{ + IntelMEState *s = INTEL_ME(dev); + + s->bus = I2C_BUS(qdev_get_parent_bus(dev)); + s->bh = qemu_bh_new(intel_me_bh, s); + s->rx_len = 0; + s->tx_len = 0; + s->tx_pos = 0; + memset(s->rx_buf, 0, sizeof(s->rx_buf)); + memset(s->tx_buf, 0, sizeof(s->tx_buf)); +} + +static uint8_t checksum(const uint8_t *ptr, int len) +{ + int sum = 0; + + for (int i = 0; i < len; i++) { + sum += ptr[i]; + } + + return 256 - sum; +} + +static int intel_me_i2c_event(I2CSlave *i2c, enum i2c_event event) +{ + IntelMEState *s = INTEL_ME(i2c); + + switch (event) { + case I2C_START_RECV: + break; + case I2C_START_SEND: + s->rx_len = 0; + memset(s->rx_buf, 0, sizeof(s->rx_buf)); + break; + case I2C_START_SEND_ASYNC: + break; + case I2C_FINISH: + printf("IntelME rx: ["); + for (int i = 0; i < s->rx_len; i++) { + if (i) { + printf(", "); + } + printf("0x%02x", s->rx_buf[i]); + } + printf("]\n"); + + s->tx_len = 10; + s->tx_pos = 0; + s->tx_buf[0] = s->rx_buf[2]; + s->tx_buf[1] = ((s->rx_buf[0] >> 2) + 1) << 2; + s->tx_buf[2] = 256 - s->tx_buf[0] - s->tx_buf[1]; + s->tx_buf[3] = i2c->address; // rsSA response Slave Address + s->tx_buf[4] = (s->rx_buf[3] >> 2) << 2; // sequence number + s->tx_buf[5] = s->rx_buf[4]; // Same command code + s->tx_buf[6] = 0x00; // OK + s->tx_buf[7] = 0x55; // NO_ERROR + s->tx_buf[8] = 0x00; + s->tx_buf[9] = checksum(s->tx_buf, s->tx_len - 1); + s->tx_buf[0] >>= 1; + i2c_bus_master(s->bus, s->bh); + break; + case I2C_NACK: + break; + } + + return 0; +} + +static uint8_t intel_me_i2c_recv(I2CSlave *i2c) +{ + return 0xff; +} + +static int intel_me_i2c_send(I2CSlave *i2c, uint8_t data) +{ + IntelMEState *s = INTEL_ME(i2c); + + assert(s->rx_len < sizeof(s->rx_buf)); + s->rx_buf[s->rx_len++] = data; + + return 0; +} + +static void intel_me_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + I2CSlaveClass *i2c = I2C_SLAVE_CLASS(oc); + + dc->realize = intel_me_realize; + i2c->event = intel_me_i2c_event; + i2c->recv = intel_me_i2c_recv; + i2c->send = intel_me_i2c_send; +} + +static const TypeInfo types[] = { + { + .name = TYPE_INTEL_ME, + .parent = TYPE_I2C_SLAVE, + .instance_size = sizeof(IntelMEState), + .class_init = intel_me_class_init, + }, +}; + +DEFINE_TYPES(types); diff --git a/hw/misc/meson.build b/hw/misc/meson.build index 1edad44b6b..a2c75894a3 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -118,7 +118,8 @@ softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files( 'aspeed_sdmc.c', 'aspeed_xdma.c', 'aspeed_peci.c', - 'fby35_cpld.c')) + 'fby35_cpld.c', + 'intel_me.c')) softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-sysreg.c')) softmmu_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_rng.c'))