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[77.183.75.191]) by smtp.gmail.com with ESMTPSA id g16-20020a1709064e5000b007072dc80e06sm4593294ejw.190.2022.06.27.00.16.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Jun 2022 00:16:50 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Herv=C3=A9_Poussineau?= , Richard Henderson , mark.cave-ayland@ilande.co.uk, balaton@eik.bme.hu, "Michael S. Tsirkin" , qemu-block@nongnu.org, =?utf-8?q?Phi?= =?utf-8?q?lippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Eduardo Habkost , Paolo Bonzini , John Snow , Marcel Apfelbaum , Bernhard Beschow Subject: [RFC PATCH 07/10] hw/pci/pci: Introduce pci_register_portio_list() Date: Mon, 27 Jun 2022 09:16:08 +0200 Message-Id: <20220627071611.8793-8-shentey@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220627071611.8793-1-shentey@gmail.com> References: <20220627071611.8793-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=shentey@gmail.com; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" pci_ide_init_ioport() and pci_register_portio_list() are introduced which mirror their ISA counterparts. But rather than asking for an ISADevice, the functions ask for PCIDevice which can be used in hw/ide/piix which fixes having to pass a NULL ISADevice which is not avialable there. Passing NULL as ISADevice to pci_ide_init_ioport() also causes a NULL ISADevice to be passed to isa_register_ioport(). Currently this function always uses the isabus global. To fix this, we'll want to determine the ISABus using isa_bus_from_device(), so no call-site must pass a NULL ISADevice. Signed-off-by: Bernhard Beschow --- hw/ide/ioport.c | 14 ++++++++++++++ hw/pci/pci.c | 18 ++++++++++++++++++ include/hw/ide/internal.h | 1 + include/hw/pci/pci.h | 21 +++++++++++++++++++++ 4 files changed, 54 insertions(+) diff --git a/hw/ide/ioport.c b/hw/ide/ioport.c index ed1f34f573..69e4fa15d4 100644 --- a/hw/ide/ioport.c +++ b/hw/ide/ioport.c @@ -25,6 +25,7 @@ #include "qemu/osdep.h" #include "hw/isa/isa.h" +#include "hw/pci/pci_bus.h" #include "qemu/error-report.h" #include "qemu/timer.h" #include "sysemu/blockdev.h" @@ -62,3 +63,16 @@ void isa_ide_init_ioport(IDEBus *bus, ISADevice *dev, int iobase, int iobase2) iobase2, ide_portio2_list, bus, "ide"); } } + +void pci_ide_init_ioport(IDEBus *bus, PCIDevice *dev, int iobase, int iobase2) +{ + assert(dev); + + pci_register_portio_list(dev, &bus->portio_list, + iobase, ide_portio_list, bus, "ide"); + + if (iobase2) { + pci_register_portio_list(dev, &bus->portio2_list, + iobase2, ide_portio2_list, bus, "ide"); + } +} diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 2f450f6a72..3046dd5477 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1440,6 +1440,24 @@ pcibus_t pci_bar_address(PCIDevice *d, return new_addr; } +void pci_register_portio_list(PCIDevice *dev, + PortioList *piolist, uint16_t start, + const MemoryRegionPortio *pio_start, + void *opaque, const char *name) +{ + PCIBus *bus; + + assert(dev); + assert(piolist && !piolist->owner); + + bus = pci_get_bus(dev); + + assert(bus); + + portio_list_init(piolist, OBJECT(dev), pio_start, opaque, name); + portio_list_add(piolist, bus->address_space_io, start); +} + static void pci_update_mappings(PCIDevice *d) { PCIIORegion *r; diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index 86ecc04ce4..4a375d3c09 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -625,6 +625,7 @@ int ide_init_drive(IDEState *s, BlockBackend *blk, IDEDriveKind kind, void ide_init2(IDEBus *bus, qemu_irq irq); void ide_exit(IDEState *s); void isa_ide_init_ioport(IDEBus *bus, ISADevice *isa, int iobase, int iobase2); +void pci_ide_init_ioport(IDEBus *bus, PCIDevice *isa, int iobase, int iobase2); void ide_register_restart_cb(IDEBus *bus); void ide_exec_cmd(IDEBus *bus, uint32_t val); diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index b54b6ef88f..91b479d542 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -522,6 +522,27 @@ void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque); pcibus_t pci_bar_address(PCIDevice *d, int reg, uint8_t type, pcibus_t size); +/** + * pci_register_portio_list: Initialize a set of io ports + * + * Several ISA devices have many dis-joint I/O ports. Worse, these I/O + * ports can be interleaved with I/O ports from other devices. This + * function makes it easy to create multiple MemoryRegions for a single + * device and use the legacy portio routines. + * + * @dev: the PCIDevice against which these are registered + * @piolist: the PortioList associated with the io ports + * @start: the base I/O port against which the portio->offset is applied. + * @portio: the ports, sorted by offset. + * @opaque: passed into the portio callbacks. + * @name: passed into memory_region_init_io. + */ +void pci_register_portio_list(PCIDevice *dev, + PortioList *piolist, + uint16_t start, + const MemoryRegionPortio *portio, + void *opaque, const char *name); + static inline void pci_set_byte(uint8_t *config, uint8_t val) {