From patchwork Mon Jun 13 13:25:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 1642848 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LMCjS2mCSz9s0r for ; Mon, 13 Jun 2022 23:54:19 +1000 (AEST) Received: from localhost ([::1]:33946 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o0kWE-0007Lm-NX for incoming@patchwork.ozlabs.org; Mon, 13 Jun 2022 09:54:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60636) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o0k6W-00036Z-Ep; Mon, 13 Jun 2022 09:27:40 -0400 Received: from gandalf.ozlabs.org ([150.107.74.76]:47025) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o0k6U-0004si-IF; Mon, 13 Jun 2022 09:27:40 -0400 Received: from gandalf.ozlabs.org (gandalf.ozlabs.org [150.107.74.76]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4LMC6c140rz4yZB; Mon, 13 Jun 2022 23:27:36 +1000 (AEST) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4LMC6V5nbqz4yTh; Mon, 13 Jun 2022 23:27:30 +1000 (AEST) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , Joe Komlodi , Troy Lee , Jamin Lin , Steven Lee , Klaus Jensen , Peter Delevoryas , Corey Minyard , Jonathan Cameron , Damien Hedde , Andrew Jeffery , Joel Stanley , Cleber Rosa , =?utf-8?q?Ph?= =?utf-8?q?ilippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , Beraldo Leal , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PATCH v2 17/17] aspeed/i2c: Enable SLAVE_ADDR_RX_MATCH always Date: Mon, 13 Jun 2022 15:25:39 +0200 Message-Id: <20220613132539.2199772-18-clg@kaod.org> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220613132539.2199772-1-clg@kaod.org> References: <20220613132539.2199772-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=yfRC=WU=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" There is no 'slave match interrupt' enable bit in the Interrupt Control Register. Consider it is always enabled and extend the mask value 'bus->regs[intr_ctrl_reg]' with the SLAVE_ADDR_RX_MATCH bit when the interrupt is raised. Signed-off-by: Cédric Le Goater --- hw/i2c/aspeed_i2c.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c index f9fce0d84b89..37ae1f2e04bd 100644 --- a/hw/i2c/aspeed_i2c.c +++ b/hw/i2c/aspeed_i2c.c @@ -32,15 +32,20 @@ #include "hw/registerfields.h" #include "trace.h" +/* Enable SLAVE_ADDR_RX_MATCH always */ +#define R_I2CD_INTR_STS_ALWAYS_ENABLE R_I2CD_INTR_STS_SLAVE_ADDR_RX_MATCH_MASK + static inline void aspeed_i2c_bus_raise_interrupt(AspeedI2CBus *bus) { AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(bus->controller); uint32_t reg_intr_sts = aspeed_i2c_bus_intr_sts_offset(bus); uint32_t intr_ctrl_reg = aspeed_i2c_bus_intr_ctrl_offset(bus); + uint32_t intr_ctrl_mask = bus->regs[intr_ctrl_reg] | + R_I2CD_INTR_STS_ALWAYS_ENABLE; bool raise_irq; if (trace_event_get_state_backends(TRACE_ASPEED_I2C_BUS_RAISE_INTERRUPT)) { - g_autofree char *buf = g_strdup_printf("%s%s%s%s%s%s", + g_autofree char *buf = g_strdup_printf("%s%s%s%s%s%s%s", aspeed_i2c_bus_pkt_mode_en(bus) && ARRAY_FIELD_EX32(bus->regs, I2CM_INTR_STS, PKT_CMD_DONE) ? "pktdone|" : "", @@ -50,6 +55,8 @@ static inline void aspeed_i2c_bus_raise_interrupt(AspeedI2CBus *bus) "ack|" : "", SHARED_ARRAY_FIELD_EX32(bus->regs, reg_intr_sts, RX_DONE) ? "done|" : "", + ARRAY_FIELD_EX32(bus->regs, I2CD_INTR_STS, SLAVE_ADDR_RX_MATCH) ? + "slave-match|" : "", SHARED_ARRAY_FIELD_EX32(bus->regs, reg_intr_sts, NORMAL_STOP) ? "normal|" : "", SHARED_ARRAY_FIELD_EX32(bus->regs, reg_intr_sts, ABNORMAL) ? @@ -58,11 +65,11 @@ static inline void aspeed_i2c_bus_raise_interrupt(AspeedI2CBus *bus) trace_aspeed_i2c_bus_raise_interrupt(bus->regs[reg_intr_sts], buf); } - raise_irq = bus->regs[reg_intr_sts] & bus->regs[intr_ctrl_reg]; + raise_irq = bus->regs[reg_intr_sts] & intr_ctrl_mask ; /* In packet mode we don't mask off INTR_STS */ if (!aspeed_i2c_bus_pkt_mode_en(bus)) { - bus->regs[reg_intr_sts] &= bus->regs[intr_ctrl_reg]; + bus->regs[reg_intr_sts] &= intr_ctrl_mask; } if (raise_irq) {