@@ -216,14 +216,34 @@ static int goldfish_rtc_post_load(void *opaque, int version_id)
return 0;
}
-static const MemoryRegionOps goldfish_rtc_ops = {
- .read = goldfish_rtc_read,
- .write = goldfish_rtc_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
- .valid = {
- .min_access_size = 4,
- .max_access_size = 4
- }
+static const MemoryRegionOps goldfish_rtc_ops[3] = {
+ [DEVICE_NATIVE_ENDIAN] = {
+ .read = goldfish_rtc_read,
+ .write = goldfish_rtc_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4
+ }
+ },
+ [DEVICE_LITTLE_ENDIAN] = {
+ .read = goldfish_rtc_read,
+ .write = goldfish_rtc_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4
+ }
+ },
+ [DEVICE_BIG_ENDIAN] = {
+ .read = goldfish_rtc_read,
+ .write = goldfish_rtc_write,
+ .endianness = DEVICE_BIG_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4
+ }
+ },
};
static const VMStateDescription goldfish_rtc_vmstate = {
@@ -265,7 +285,8 @@ static void goldfish_rtc_realize(DeviceState *d, Error **errp)
SysBusDevice *dev = SYS_BUS_DEVICE(d);
GoldfishRTCState *s = GOLDFISH_RTC(d);
- memory_region_init_io(&s->iomem, OBJECT(s), &goldfish_rtc_ops, s,
+ memory_region_init_io(&s->iomem, OBJECT(s),
+ &goldfish_rtc_ops[s->endianness], s,
"goldfish_rtc", 0x24);
sysbus_init_mmio(dev, &s->iomem);
@@ -274,10 +295,16 @@ static void goldfish_rtc_realize(DeviceState *d, Error **errp)
s->timer = timer_new_ns(rtc_clock, goldfish_rtc_interrupt, s);
}
+static Property goldfish_rtc_properties[] = {
+ DEFINE_PROP_UINT8("endianness", GoldfishRTCState, endianness, DEVICE_NATIVE_ENDIAN),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void goldfish_rtc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ device_class_set_props(dc, goldfish_rtc_properties);
dc->realize = goldfish_rtc_realize;
dc->reset = goldfish_rtc_reset;
dc->vmsd = &goldfish_rtc_vmstate;
@@ -42,6 +42,8 @@ struct GoldfishRTCState {
uint32_t irq_pending;
uint32_t irq_enabled;
uint32_t time_high;
+
+ uint8_t endianness;
};
#endif
Add an endianness property to allow configuring the RTC as either native, little or big endian. Cc: Laurent Vivier <lvivier@redhat.com> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Stafford Horne <shorne@gmail.com> --- In a recent mail thread[0] it was discussed that future users of goldfish devices should use little-endian rather than native endian. This is to avoid having to define special ioread/write routines in the Linux kernel as the default of the Linux kernel is to use little-endian. I have defined a property to allow us to make this change the endianness of the device at initialization time. For OpenRISC we can now set the qemu device endianness property to little-endian and the device works. For now I kept the default as DEVICE_NATIVE_ENDIAN for illustration purposes I could also do: - Add the "endianness" property to all goldfish devices. - Switch the default to LITTLE_ENDIAN and just set BIG_ENDIAN for m68k only. - Just the bare minimum, using this patch and also set little-endian in OpenRISC. - Just drop this patch and use BIG_ENDIAN access for goldfish in the kernel for OpenRISC like m68k does. I have tested this with the OpenRISC virt platform[1] available here (now with pci support). [0] https://lore.kernel.org/all/CAK8P3a13PTsMExyXZm5sZM3WBK-8hoNFjYoi19pHmKKCJQmHeA@mail.gmail.com/ [1] https://github.com/stffrdhrn/qemu/commits/or1k-virt-2 hw/rtc/goldfish_rtc.c | 45 ++++++++++++++++++++++++++++------- include/hw/rtc/goldfish_rtc.h | 2 ++ 2 files changed, 38 insertions(+), 9 deletions(-)