Message ID | 20220523095629.144441-1-dgilbert@redhat.com |
---|---|
State | New |
Headers | show |
Series | Trivial: 3 char repeat typos | expand |
On Mon, May 23, 2022 at 10:56:29AM +0100, Dr. David Alan Gilbert (git) wrote: > From: "Dr. David Alan Gilbert" <dgilbert@redhat.com> > > Inspired by Julia Lawall's fixing of Linux > kernel comments, I looked at qemu, although I did it manually. > > Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> > --- > hw/intc/openpic.c | 2 +- > hw/net/imx_fec.c | 2 +- > hw/pci/pcie_aer.c | 2 +- > hw/pci/shpc.c | 2 +- > hw/ppc/spapr_caps.c | 2 +- > hw/scsi/spapr_vscsi.c | 2 +- > qapi/net.json | 2 +- > target/arm/cpu64.c | 2 +- > tools/virtiofsd/passthrough_ll.c | 2 +- > ui/input.c | 2 +- > 10 files changed, 10 insertions(+), 10 deletions(-) Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> With regards, Daniel
On Mon, 23 May 2022 at 11:09, Dr. David Alan Gilbert (git) <dgilbert@redhat.com> wrote: > > From: "Dr. David Alan Gilbert" <dgilbert@redhat.com> > > Inspired by Julia Lawall's fixing of Linux > kernel comments, I looked at qemu, although I did it manually. > > Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Checkpatch would probably ask you to fix up some of the comment styles when you touch some of these. Either way: Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c > index 04427e073f..2467c5bf76 100644 > --- a/target/arm/cpu64.c > +++ b/target/arm/cpu64.c > @@ -997,7 +997,7 @@ static void aarch64_a64fx_initfn(Object *obj) > cpu->gic_vpribits = 5; > cpu->gic_vprebits = 5; > > - /* Suppport of A64FX's vector length are 128,256 and 512bit only */ > + /* Support of A64FX's vector length are 128,256 and 512bit only */ This one came up in review of a different patch that happened to touch this function. We should ideally rephrase it to fix all of the typo, the missing space after comma and the unnatural grammar: /* The A64FX supports only 128, 256 and 512 bit vector lengths */ thanks -- PMM
* Peter Maydell (peter.maydell@linaro.org) wrote: > On Mon, 23 May 2022 at 11:09, Dr. David Alan Gilbert (git) > <dgilbert@redhat.com> wrote: > > > > From: "Dr. David Alan Gilbert" <dgilbert@redhat.com> > > > > Inspired by Julia Lawall's fixing of Linux > > kernel comments, I looked at qemu, although I did it manually. > > > > Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> > > Checkpatch would probably ask you to fix up some of the comment > styles when you touch some of these. Either way: The only one it actually moaned about was hw/pci/shpc.c's comment style. Does this need fixing in this patch? > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Thanks, Dave > > diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c > > index 04427e073f..2467c5bf76 100644 > > --- a/target/arm/cpu64.c > > +++ b/target/arm/cpu64.c > > @@ -997,7 +997,7 @@ static void aarch64_a64fx_initfn(Object *obj) > > cpu->gic_vpribits = 5; > > cpu->gic_vprebits = 5; > > > > - /* Suppport of A64FX's vector length are 128,256 and 512bit only */ > > + /* Support of A64FX's vector length are 128,256 and 512bit only */ > > This one came up in review of a different patch that happened to touch > this function. We should ideally rephrase it to fix all of the typo, the > missing space after comma and the unnatural grammar: > > /* The A64FX supports only 128, 256 and 512 bit vector lengths */ > thanks > -- PMM >
On Mon, 23 May 2022 at 11:24, Dr. David Alan Gilbert <dgilbert@redhat.com> wrote: > > * Peter Maydell (peter.maydell@linaro.org) wrote: > > On Mon, 23 May 2022 at 11:09, Dr. David Alan Gilbert (git) > > <dgilbert@redhat.com> wrote: > > > > > > From: "Dr. David Alan Gilbert" <dgilbert@redhat.com> > > > > > > Inspired by Julia Lawall's fixing of Linux > > > kernel comments, I looked at qemu, although I did it manually. > > > > > > Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> > > > > Checkpatch would probably ask you to fix up some of the comment > > styles when you touch some of these. Either way: > > The only one it actually moaned about was hw/pci/shpc.c's comment style. > Does this need fixing in this patch? Personally I would fix it, but I don't insist that you do (hence "Either way"). -- PMM
On 5/23/22 11:56, Dr. David Alan Gilbert (git) wrote: > From: "Dr. David Alan Gilbert" <dgilbert@redhat.com> > > Inspired by Julia Lawall's fixing of Linux > kernel comments, I looked at qemu, although I did it manually. > > Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Thanks, C. > --- > hw/intc/openpic.c | 2 +- > hw/net/imx_fec.c | 2 +- > hw/pci/pcie_aer.c | 2 +- > hw/pci/shpc.c | 2 +- > hw/ppc/spapr_caps.c | 2 +- > hw/scsi/spapr_vscsi.c | 2 +- > qapi/net.json | 2 +- > target/arm/cpu64.c | 2 +- > tools/virtiofsd/passthrough_ll.c | 2 +- > ui/input.c | 2 +- > 10 files changed, 10 insertions(+), 10 deletions(-) > > diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c > index 49504e740f..b0787e8ee7 100644 > --- a/hw/intc/openpic.c > +++ b/hw/intc/openpic.c > @@ -729,7 +729,7 @@ static void openpic_tmr_set_tmr(OpenPICTimer *tmr, uint32_t val, bool enabled) > } > > /* > - * Returns the currrent tccr value, i.e., timer value (in clocks) with > + * Returns the current tccr value, i.e., timer value (in clocks) with > * appropriate TOG. > */ > static uint64_t openpic_tmr_get_timer(OpenPICTimer *tmr) > diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c > index 0db9aaf76a..8c11b237de 100644 > --- a/hw/net/imx_fec.c > +++ b/hw/net/imx_fec.c > @@ -438,7 +438,7 @@ static void imx_eth_update(IMXFECState *s) > * assignment fail. > * > * To ensure that all versions of Linux work, generate ENET_INT_MAC > - * interrrupts on both interrupt lines. This should be changed if and when > + * interrupts on both interrupt lines. This should be changed if and when > * qemu supports IOMUX. > */ > if (s->regs[ENET_EIR] & s->regs[ENET_EIMR] & > diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c > index 92bd0530dd..eff62f3945 100644 > --- a/hw/pci/pcie_aer.c > +++ b/hw/pci/pcie_aer.c > @@ -323,7 +323,7 @@ static void pcie_aer_msg_root_port(PCIDevice *dev, const PCIEAERMsg *msg) > */ > } > > - /* Errro Message Received: Root Error Status register */ > + /* Error Message Received: Root Error Status register */ > switch (msg->severity) { > case PCI_ERR_ROOT_CMD_COR_EN: > if (root_status & PCI_ERR_ROOT_COR_RCV) { > diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c > index 28e62174c4..88b56da799 100644 > --- a/hw/pci/shpc.c > +++ b/hw/pci/shpc.c > @@ -480,7 +480,7 @@ static const MemoryRegionOps shpc_mmio_ops = { > .endianness = DEVICE_LITTLE_ENDIAN, > .valid = { > /* SHPC ECN requires dword accesses, but the original 1.0 spec doesn't. > - * It's easier to suppport all sizes than worry about it. */ > + * It's easier to support all sizes than worry about it. */ > .min_access_size = 1, > .max_access_size = 4, > }, > diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c > index 655ab856a0..b4283055c1 100644 > --- a/hw/ppc/spapr_caps.c > +++ b/hw/ppc/spapr_caps.c > @@ -553,7 +553,7 @@ static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val, > * instruction is a harmless no-op. It won't correctly > * implement the cache count flush *but* if we have > * count-cache-disabled in the host, that flush is > - * unnnecessary. So, specifically allow this case. This > + * unnecessary. So, specifically allow this case. This > * allows us to have better performance on POWER9 DD2.3, > * while still working on POWER9 DD2.2 and POWER8 host > * cpus. > diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c > index a07a8e1523..e320ccaa23 100644 > --- a/hw/scsi/spapr_vscsi.c > +++ b/hw/scsi/spapr_vscsi.c > @@ -1013,7 +1013,7 @@ static int vscsi_send_capabilities(VSCSIState *s, vscsi_req *req) > } > > /* > - * Current implementation does not suppport any migration or > + * Current implementation does not support any migration or > * reservation capabilities. Construct the response telling the > * guest not to use them. > */ > diff --git a/qapi/net.json b/qapi/net.json > index b92f3f5fb4..8da34360db 100644 > --- a/qapi/net.json > +++ b/qapi/net.json > @@ -298,7 +298,7 @@ > # > # @udp: use the udp version of l2tpv3 encapsulation > # > -# @cookie64: use 64 bit coookies > +# @cookie64: use 64 bit cookies > # > # @counter: have sequence counter > # > diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c > index 04427e073f..2467c5bf76 100644 > --- a/target/arm/cpu64.c > +++ b/target/arm/cpu64.c > @@ -997,7 +997,7 @@ static void aarch64_a64fx_initfn(Object *obj) > cpu->gic_vpribits = 5; > cpu->gic_vprebits = 5; > > - /* Suppport of A64FX's vector length are 128,256 and 512bit only */ > + /* Support of A64FX's vector length are 128,256 and 512bit only */ > aarch64_add_sve_properties(obj); > bitmap_zero(cpu->sve_vq_supported, ARM_MAX_VQ); > set_bit(0, cpu->sve_vq_supported); /* 128bit */ > diff --git a/tools/virtiofsd/passthrough_ll.c b/tools/virtiofsd/passthrough_ll.c > index b15c631ca5..7a73dfcce9 100644 > --- a/tools/virtiofsd/passthrough_ll.c > +++ b/tools/virtiofsd/passthrough_ll.c > @@ -2319,7 +2319,7 @@ static int do_lo_create(fuse_req_t req, struct lo_inode *parent_inode, > * If security.selinux has not been remapped and selinux is enabled, > * use fscreate to set context before file creation. If not, use > * tmpfile method for regular files. Otherwise fallback to > - * non-atomic method of file creation and xattr settting. > + * non-atomic method of file creation and xattr setting. > */ > if (!mapped_name && lo->use_fscreate) { > err = do_create_secctx_fscreate(req, parent_inode, name, mode, fi, > diff --git a/ui/input.c b/ui/input.c > index 8ac407dec4..e2a90af889 100644 > --- a/ui/input.c > +++ b/ui/input.c > @@ -364,7 +364,7 @@ void qemu_input_event_send(QemuConsole *src, InputEvent *evt) > * when 'alt+print' was pressed. This flaw is now fixed and the > * 'sysrq' key serves no further purpose. We normalize it to > * 'print', so that downstream receivers of the event don't > - * neeed to deal with this mistake > + * need to deal with this mistake > */ > if (evt->type == INPUT_EVENT_KIND_KEY && > evt->u.key.data->key->u.qcode.data == Q_KEY_CODE_SYSRQ) {
diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c index 49504e740f..b0787e8ee7 100644 --- a/hw/intc/openpic.c +++ b/hw/intc/openpic.c @@ -729,7 +729,7 @@ static void openpic_tmr_set_tmr(OpenPICTimer *tmr, uint32_t val, bool enabled) } /* - * Returns the currrent tccr value, i.e., timer value (in clocks) with + * Returns the current tccr value, i.e., timer value (in clocks) with * appropriate TOG. */ static uint64_t openpic_tmr_get_timer(OpenPICTimer *tmr) diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c index 0db9aaf76a..8c11b237de 100644 --- a/hw/net/imx_fec.c +++ b/hw/net/imx_fec.c @@ -438,7 +438,7 @@ static void imx_eth_update(IMXFECState *s) * assignment fail. * * To ensure that all versions of Linux work, generate ENET_INT_MAC - * interrrupts on both interrupt lines. This should be changed if and when + * interrupts on both interrupt lines. This should be changed if and when * qemu supports IOMUX. */ if (s->regs[ENET_EIR] & s->regs[ENET_EIMR] & diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c index 92bd0530dd..eff62f3945 100644 --- a/hw/pci/pcie_aer.c +++ b/hw/pci/pcie_aer.c @@ -323,7 +323,7 @@ static void pcie_aer_msg_root_port(PCIDevice *dev, const PCIEAERMsg *msg) */ } - /* Errro Message Received: Root Error Status register */ + /* Error Message Received: Root Error Status register */ switch (msg->severity) { case PCI_ERR_ROOT_CMD_COR_EN: if (root_status & PCI_ERR_ROOT_COR_RCV) { diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c index 28e62174c4..88b56da799 100644 --- a/hw/pci/shpc.c +++ b/hw/pci/shpc.c @@ -480,7 +480,7 @@ static const MemoryRegionOps shpc_mmio_ops = { .endianness = DEVICE_LITTLE_ENDIAN, .valid = { /* SHPC ECN requires dword accesses, but the original 1.0 spec doesn't. - * It's easier to suppport all sizes than worry about it. */ + * It's easier to support all sizes than worry about it. */ .min_access_size = 1, .max_access_size = 4, }, diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 655ab856a0..b4283055c1 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -553,7 +553,7 @@ static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val, * instruction is a harmless no-op. It won't correctly * implement the cache count flush *but* if we have * count-cache-disabled in the host, that flush is - * unnnecessary. So, specifically allow this case. This + * unnecessary. So, specifically allow this case. This * allows us to have better performance on POWER9 DD2.3, * while still working on POWER9 DD2.2 and POWER8 host * cpus. diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c index a07a8e1523..e320ccaa23 100644 --- a/hw/scsi/spapr_vscsi.c +++ b/hw/scsi/spapr_vscsi.c @@ -1013,7 +1013,7 @@ static int vscsi_send_capabilities(VSCSIState *s, vscsi_req *req) } /* - * Current implementation does not suppport any migration or + * Current implementation does not support any migration or * reservation capabilities. Construct the response telling the * guest not to use them. */ diff --git a/qapi/net.json b/qapi/net.json index b92f3f5fb4..8da34360db 100644 --- a/qapi/net.json +++ b/qapi/net.json @@ -298,7 +298,7 @@ # # @udp: use the udp version of l2tpv3 encapsulation # -# @cookie64: use 64 bit coookies +# @cookie64: use 64 bit cookies # # @counter: have sequence counter # diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 04427e073f..2467c5bf76 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -997,7 +997,7 @@ static void aarch64_a64fx_initfn(Object *obj) cpu->gic_vpribits = 5; cpu->gic_vprebits = 5; - /* Suppport of A64FX's vector length are 128,256 and 512bit only */ + /* Support of A64FX's vector length are 128,256 and 512bit only */ aarch64_add_sve_properties(obj); bitmap_zero(cpu->sve_vq_supported, ARM_MAX_VQ); set_bit(0, cpu->sve_vq_supported); /* 128bit */ diff --git a/tools/virtiofsd/passthrough_ll.c b/tools/virtiofsd/passthrough_ll.c index b15c631ca5..7a73dfcce9 100644 --- a/tools/virtiofsd/passthrough_ll.c +++ b/tools/virtiofsd/passthrough_ll.c @@ -2319,7 +2319,7 @@ static int do_lo_create(fuse_req_t req, struct lo_inode *parent_inode, * If security.selinux has not been remapped and selinux is enabled, * use fscreate to set context before file creation. If not, use * tmpfile method for regular files. Otherwise fallback to - * non-atomic method of file creation and xattr settting. + * non-atomic method of file creation and xattr setting. */ if (!mapped_name && lo->use_fscreate) { err = do_create_secctx_fscreate(req, parent_inode, name, mode, fi, diff --git a/ui/input.c b/ui/input.c index 8ac407dec4..e2a90af889 100644 --- a/ui/input.c +++ b/ui/input.c @@ -364,7 +364,7 @@ void qemu_input_event_send(QemuConsole *src, InputEvent *evt) * when 'alt+print' was pressed. This flaw is now fixed and the * 'sysrq' key serves no further purpose. We normalize it to * 'print', so that downstream receivers of the event don't - * neeed to deal with this mistake + * need to deal with this mistake */ if (evt->type == INPUT_EVENT_KIND_KEY && evt->u.key.data->key->u.qcode.data == Q_KEY_CODE_SYSRQ) {