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[193.116.108.62]) by smtp.gmail.com with ESMTPSA id x48-20020a056a000bf000b0050dc76281dcsm6056301pfu.182.2022.05.03.03.33.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 May 2022 03:33:50 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , qemu-devel@nongnu.org Subject: [RFC PATCH 3/4] tcg/ppc: Optimize memory ordering generation with lwsync Date: Tue, 3 May 2022 20:33:33 +1000 Message-Id: <20220503103334.2046414-3-npiggin@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503103334.2046414-1-npiggin@gmail.com> References: <20220503103334.2046414-1-npiggin@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=npiggin@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" lwsync orders more than just LD_LD, importantly it matches x86 and s390 default memory ordering. Signed-off-by: Nicholas Piggin --- target/ppc/cpu.h | 2 ++ tcg/ppc/tcg-target.c.inc | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index c2b6c987c0..0b0e9761cd 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -28,6 +28,8 @@ #define TCG_GUEST_DEFAULT_MO 0 +#define PPC_LWSYNC_MO (TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST) + #define TARGET_PAGE_BITS_64K 16 #define TARGET_PAGE_BITS_16M 24 diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 3ff845d063..b87fc2383e 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -1834,7 +1834,7 @@ static void tcg_out_mb(TCGContext *s, TCGArg a0) { uint32_t insn = HWSYNC; a0 &= TCG_MO_ALL; - if (a0 == TCG_MO_LD_LD) { + if ((a0 & PPC_LWSYNC_MO) == a0) { insn = LWSYNC; } tcg_out32(s, insn);