| Message ID | 20220502143934.71908-14-victor.colombo@eldorado.org.br |
|---|---|
| State | New |
| Headers | show |
| Series | target/ppc: Remove hidden usages of *env | expand |
On 5/2/22 07:39, Víctor Colombo wrote: > msr_me macro hides the usage of env->msr, which is a bad behavior > Substitute it with FIELD_EX64 calls that explicitly use env->msr > as a parameter. > > Suggested-by: Richard Henderson <richard.henderson@linaro.org> > Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br> > > --- > > v2: Remove M_MSR_CM and use FIELD_EX64 instead > Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br> > --- > target/ppc/cpu.h | 2 +- > target/ppc/mmu_common.c | 2 +- > target/ppc/mmu_helper.c | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > index 294c61c9dc..8e652691cf 100644 > --- a/target/ppc/cpu.h > +++ b/target/ppc/cpu.h > @@ -354,6 +354,7 @@ typedef enum { > #define MSR_RI 1 /* Recoverable interrupt 1 */ > #define MSR_LE 0 /* Little-endian mode 1 hflags */ > > +FIELD(MSR, CM, MSR_CM, 1) Patch title is wrong. r~
On 5/2/22 14:38, Richard Henderson wrote: > On 5/2/22 07:39, Víctor Colombo wrote: >> msr_me macro hides the usage of env->msr, which is a bad behavior >> Substitute it with FIELD_EX64 calls that explicitly use env->msr >> as a parameter. >> >> Suggested-by: Richard Henderson <richard.henderson@linaro.org> >> Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br> >> >> --- >> >> v2: Remove M_MSR_CM and use FIELD_EX64 instead >> Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br> >> --- >> target/ppc/cpu.h | 2 +- >> target/ppc/mmu_common.c | 2 +- >> target/ppc/mmu_helper.c | 2 +- >> 3 files changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h >> index 294c61c9dc..8e652691cf 100644 >> --- a/target/ppc/cpu.h >> +++ b/target/ppc/cpu.h >> @@ -354,6 +354,7 @@ typedef enum { >> #define MSR_RI 1 /* Recoverable interrupt 1 */ >> #define MSR_LE 0 /* Little-endian mode 1 hflags */ >> +FIELD(MSR, CM, MSR_CM, 1) > > Patch title is wrong. Otherwise, Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 294c61c9dc..8e652691cf 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -354,6 +354,7 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 */ #define MSR_LE 0 /* Little-endian mode 1 hflags */ +FIELD(MSR, CM, MSR_CM, 1) FIELD(MSR, GS, MSR_GS, 1) FIELD(MSR, POW, MSR_POW, 1) FIELD(MSR, CE, MSR_CE, 1) @@ -480,7 +481,6 @@ FIELD(MSR, LE, MSR_LE, 1) #else #define msr_hv (0) #endif -#define msr_cm ((env->msr >> MSR_CM) & 1) #define msr_fe0 ((env->msr >> MSR_FE0) & 1) #define msr_fe1 ((env->msr >> MSR_FE1) & 1) #define msr_ep ((env->msr >> MSR_EP) & 1) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 7e77b9b84a..031bb4493b 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -692,7 +692,7 @@ int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb, hwaddr mask; uint32_t tlb_pid; - if (!msr_cm) { + if (!FIELD_EX64(env->msr, MSR, CM)) { /* In 32bit mode we can only address 32bit EAs */ address = (uint32_t)address; } diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 5bb5c71038..15239dc95b 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -1003,7 +1003,7 @@ void helper_booke206_tlbwe(CPUPPCState *env) /* Add a mask for page attributes */ mask |= MAS2_ACM | MAS2_VLE | MAS2_W | MAS2_I | MAS2_M | MAS2_G | MAS2_E; - if (!msr_cm) { + if (!FIELD_EX64(env->msr, MSR, CM)) { /* * Executing a tlbwe instruction in 32-bit mode will set bits * 0:31 of the TLB EPN field to zero.