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[77.183.198.236]) by smtp.gmail.com with ESMTPSA id u26sm986753ejg.196.2022.02.17.02.20.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 02:20:23 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Subject: [PATCH v4 5/7] hw/isa/piix4: Resolve global instance variable Date: Thu, 17 Feb 2022 11:19:22 +0100 Message-Id: <20220217101924.15347-6-shentey@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220217101924.15347-1-shentey@gmail.com> References: <20220217101924.15347-1-shentey@gmail.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::636 (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=shentey@gmail.com; helo=mail-ej1-x636.google.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.978, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , =?utf-8?q?Herv=C3=A9_Poussineau?= , Bernhard Beschow , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Now that piix4_set_irq's opaque parameter references own PIIX4State, piix4_dev becomes redundant. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Acked-by: Michael S. Tsirkin --- hw/isa/piix4.c | 10 +++------- include/hw/southbridge/piix.h | 2 -- 2 files changed, 3 insertions(+), 9 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index caa2002e2c..2e9b5ccada 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -39,8 +39,6 @@ #include "sysemu/runstate.h" #include "qom/object.h" -PCIDevice *piix4_dev; - struct PIIX4State { PCIDevice dev; qemu_irq cpu_intr; @@ -58,16 +56,16 @@ static void piix4_set_irq(void *opaque, int irq_num, int level) { int i, pic_irq, pic_level; PIIX4State *s = opaque; - PCIBus *bus = pci_get_bus(piix4_dev); + PCIBus *bus = pci_get_bus(&s->dev); /* now we change the pic irq level according to the piix irq mappings */ /* XXX: optimize */ - pic_irq = piix4_dev->config[PIIX_PIRQCA + irq_num]; + pic_irq = s->dev.config[PIIX_PIRQCA + irq_num]; if (pic_irq < 16) { /* The pic level is the logical OR of all the PCI irqs mapped to it. */ pic_level = 0; for (i = 0; i < 4; i++) { - if (pic_irq == piix4_dev->config[PIIX_PIRQCA + i]) { + if (pic_irq == s->dev.config[PIIX_PIRQCA + i]) { pic_level |= pci_bus_get_irq_level(bus, i); } } @@ -219,8 +217,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp) return; } isa_init_irq(ISA_DEVICE(&s->rtc), &s->rtc.irq, RTC_ISA_IRQ); - - piix4_dev = dev; } static void piix4_init(Object *obj) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 6387f2b612..f63f83e5c6 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -70,8 +70,6 @@ typedef struct PIIXState PIIX3State; DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, TYPE_PIIX3_PCI_DEVICE) -extern PCIDevice *piix4_dev; - PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus); DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus);