Message ID | 20220216224519.157233-5-shentey@gmail.com |
---|---|
State | New |
Headers | show |
Series | malta: Fix PCI IRQ levels to be preserved during migration, cleanup | expand |
On Wed, Feb 16, 2022 at 11:45:16PM +0100, Bernhard Beschow wrote: > Passing PIIX4State rather than just the qemu_irq allows for resolving > the global piix4_dev variable. > > Signed-off-by: Bernhard Beschow <shentey@gmail.com> > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> > --- > hw/isa/piix4.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c > index 179968b18e..caa2002e2c 100644 > --- a/hw/isa/piix4.c > +++ b/hw/isa/piix4.c > @@ -57,7 +57,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE) > static void piix4_set_irq(void *opaque, int irq_num, int level) > { > int i, pic_irq, pic_level; > - qemu_irq *pic = opaque; > + PIIX4State *s = opaque; > PCIBus *bus = pci_get_bus(piix4_dev); > > /* now we change the pic irq level according to the piix irq mappings */ > @@ -71,7 +71,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level) > pic_level |= pci_bus_get_irq_level(bus, i); > } > } > - qemu_set_irq(pic[pic_irq], pic_level); > + qemu_set_irq(s->isa[pic_irq], pic_level); > } > } > > @@ -319,7 +319,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) > NULL, 0, NULL); > } > > - pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s->isa, 4); > + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, 4); > > return dev; > } > -- > 2.35.1 > > >
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 179968b18e..caa2002e2c 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -57,7 +57,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE) static void piix4_set_irq(void *opaque, int irq_num, int level) { int i, pic_irq, pic_level; - qemu_irq *pic = opaque; + PIIX4State *s = opaque; PCIBus *bus = pci_get_bus(piix4_dev); /* now we change the pic irq level according to the piix irq mappings */ @@ -71,7 +71,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level) pic_level |= pci_bus_get_irq_level(bus, i); } } - qemu_set_irq(pic[pic_irq], pic_level); + qemu_set_irq(s->isa[pic_irq], pic_level); } } @@ -319,7 +319,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) NULL, 0, NULL); } - pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s->isa, 4); + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, 4); return dev; }