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[87.123.193.69]) by smtp.gmail.com with ESMTPSA id z14sm889288edc.62.2022.02.12.03.35.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Feb 2022 03:35:44 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Subject: [PATCH v2 4/5] isa/piix4: Fix PCI IRQ levels to be preserved in VMState Date: Sat, 12 Feb 2022 12:35:18 +0100 Message-Id: <20220212113519.69527-5-shentey@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220212113519.69527-1-shentey@gmail.com> References: <20220212113519.69527-1-shentey@gmail.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::52f (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=shentey@gmail.com; helo=mail-ed1-x52f.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , =?utf-8?q?Herv=C3=A9_Poussineau?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Now that pci_irq_levels[] is part of PIIX4State, the PCI IRQ levels can be saved and restored via the VMState mechanism. This fixes migrated VMs to start with PCI IRQ levels zeroed, which is a bug. Suggested-by: Peter Maydell Suggested-by: Philippe Mathieu-Daudé Signed-off-by: Bernhard Beschow --- hw/isa/piix4.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 964e09cf7f..a9322851db 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -45,7 +45,7 @@ struct PIIX4State { qemu_irq *isa; qemu_irq i8259[ISA_NUM_IRQS]; - int pci_irq_levels[PIIX_NUM_PIRQS]; + int32_t pci_irq_levels[PIIX_NUM_PIRQS]; RTCState rtc; /* Reset Control Register */ @@ -128,12 +128,14 @@ static int piix4_ide_post_load(void *opaque, int version_id) static const VMStateDescription vmstate_piix4 = { .name = "PIIX4", - .version_id = 3, + .version_id = 4, .minimum_version_id = 2, .post_load = piix4_ide_post_load, .fields = (VMStateField[]) { VMSTATE_PCI_DEVICE(dev, PIIX4State), VMSTATE_UINT8_V(rcr, PIIX4State, 3), + VMSTATE_INT32_ARRAY_V(pci_irq_levels, PIIX4State, + PIIX_NUM_PIRQS, 4), VMSTATE_END_OF_LIST() } };