[v14,03/26] target/loongarch: Add main translation routines

This patch adds main translation routines and
basic functions for translation.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/loongarch/helper.h    |   6 ++
 target/loongarch/op_helper.c |  21 +++++
 target/loongarch/translate.c | 159 +++++++++++++++++++++++++++++++++++
 target/loongarch/translate.h |  26 ++++++
 4 files changed, 212 insertions(+)
 create mode 100644 target/loongarch/helper.h
 create mode 100644 target/loongarch/op_helper.c
 create mode 100644 target/loongarch/translate.c
 create mode 100644 target/loongarch/translate.h

On 1/6/22 17:41, Song Gao wrote:
> This patch adds main translation routines and
> basic functions for translation.
>
> Signed-off-by: Song Gao<gaosong@loongson.cn>
> Signed-off-by: Xiaojuan Yang<yangxiaojuan@loongson.cn>
> Reviewed-by: Richard Henderson<richard.henderson@linaro.org>
> ---
>   target/loongarch/helper.h    |   6 ++
>   target/loongarch/op_helper.c |  21 +++++
>   target/loongarch/translate.c | 159 +++++++++++++++++++++++++++++++++++
>   target/loongarch/translate.h |  26 ++++++
>   4 files changed, 212 insertions(+)
>   create mode 100644 target/loongarch/helper.h
>   create mode 100644 target/loongarch/op_helper.c
>   create mode 100644 target/loongarch/translate.c
>   create mode 100644 target/loongarch/translate.h
>
> diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
> new file mode 100644
> index 0000000000..eb771c0628
> --- /dev/null
> +++ b/target/loongarch/helper.h
> @@ -0,0 +1,6 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/*
> + * Copyright (c) 2021 Loongson Technology Corporation Limited
> + */
> +
> +DEF_HELPER_2(raise_exception, noreturn, env, i32)
> diff --git a/target/loongarch/op_helper.c b/target/loongarch/op_helper.c
> new file mode 100644
> index 0000000000..903810951e
> --- /dev/null
> +++ b/target/loongarch/op_helper.c
> @@ -0,0 +1,21 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/*
> + * LoongArch emulation helpers for QEMU.
> + *
> + * Copyright (c) 2021 Loongson Technology Corporation Limited
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/main-loop.h"
> +#include "cpu.h"
> +#include "qemu/host-utils.h"
> +#include "exec/helper-proto.h"
> +#include "exec/exec-all.h"
> +#include "exec/cpu_ldst.h"
> +#include "internals.h"
> +
> +/* Exceptions helpers */
> +void helper_raise_exception(CPULoongArchState *env, uint32_t exception)
> +{
> +    do_raise_exception(env, exception, GETPC());
> +}
> diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c
> new file mode 100644
> index 0000000000..048c8953b6
> --- /dev/null
> +++ b/target/loongarch/translate.c
> @@ -0,0 +1,159 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/*
> + * LoongArch emulation for QEMU - main translation routines.
> + *
> + * Copyright (c) 2021 Loongson Technology Corporation Limited
> + */
> +
> +#include "qemu/osdep.h"
> +#include "cpu.h"
> +#include "tcg/tcg-op.h"
> +#include "exec/translator.h"
> +#include "exec/helper-proto.h"
> +#include "exec/helper-gen.h"
> +
> +#include "exec/translator.h"
> +#include "exec/log.h"
> +#include "qemu/qemu-print.h"
> +#include "translate.h"
> +#include "internals.h"
> +
> +/* Global register indices */
> +TCGv cpu_gpr[32], cpu_pc;
> +static TCGv cpu_lladdr, cpu_llval;
> +TCGv_i32 cpu_fcsr0;
> +TCGv_i64 cpu_fpr[32];
> +
> +#define DISAS_STOP       DISAS_TARGET_0
> +
> +void generate_exception(DisasContext *ctx, int excp)
> +{
> +    tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
> +    gen_helper_raise_exception(cpu_env, tcg_constant_i32(excp));
> +    ctx->base.is_jmp = DISAS_NORETURN;
> +}
> +
> +static inline void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
> +{
> +    if (translator_use_goto_tb(&ctx->base, dest)) {
> +        tcg_gen_goto_tb(n);
> +        tcg_gen_movi_tl(cpu_pc, dest);
> +        tcg_gen_exit_tb(ctx->base.tb, n);
> +    } else {
> +        tcg_gen_movi_tl(cpu_pc, dest);
> +        tcg_gen_lookup_and_goto_ptr();
> +    }
> +}
> +
> +static void loongarch_tr_init_disas_context(DisasContextBase *dcbase,
> +                                            CPUState *cs)
> +{
> +    int64_t bound;
> +    DisasContext *ctx = container_of(dcbase, DisasContext, base);
> +
> +    ctx->page_start = ctx->base.pc_first & TARGET_PAGE_MASK;
> +    ctx->mem_idx = ctx->base.tb->flags;
> +
> +    /* Bound the number of insns to execute to those left on the page.  */
> +    bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4;
> +    ctx->base.max_insns = MIN(ctx->base.max_insns, bound);
> +}
> +
> +static void loongarch_tr_tb_start(DisasContextBase *dcbase, CPUState *cs)
> +{
> +}
> +
> +static void loongarch_tr_insn_start(DisasContextBase *dcbase, CPUState *cs)
> +{
> +    DisasContext *ctx = container_of(dcbase, DisasContext, base);
> +
> +    tcg_gen_insn_start(ctx->base.pc_next);
> +}
> +
> +static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
> +{
> +    CPULoongArchState *env = cs->env_ptr;
> +    DisasContext *ctx = container_of(dcbase, DisasContext, base);
> +
> +    ctx->opcode = cpu_ldl_code(env, ctx->base.pc_next);
> +
> +    if (!decode(ctx, ctx->opcode)) {
> +        qemu_log_mask(LOG_UNIMP, "Error: unkown opcode. 0x%lx: 0x%x\n",
Typo: "unknown"
> +                      ctx->base.pc_next, ctx->opcode);
> +        generate_exception(ctx, EXCP_INE);
> +    }
> +
> +    ctx->base.pc_next += 4;
> +}
> +
> +static void loongarch_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
> +{
> +    DisasContext *ctx = container_of(dcbase, DisasContext, base);
> +
> +    switch (ctx->base.is_jmp) {
> +    case DISAS_STOP:
> +        tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
> +        tcg_gen_lookup_and_goto_ptr();
> +        break;
> +    case DISAS_TOO_MANY:
> +        gen_goto_tb(ctx, 0, ctx->base.pc_next);
> +        break;
> +    case DISAS_NORETURN:
> +        break;
> +    default:
> +        g_assert_not_reached();
> +    }
> +}
> +
> +static void loongarch_tr_disas_log(const DisasContextBase *dcbase, CPUState *cs)
> +{
> +    qemu_log("IN: %s\n", lookup_symbol(dcbase->pc_first));
> +    log_target_disas(cs, dcbase->pc_first, dcbase->tb->size);
> +}
> +
> +static const TranslatorOps loongarch_tr_ops = {
> +    .init_disas_context = loongarch_tr_init_disas_context,
> +    .tb_start           = loongarch_tr_tb_start,
> +    .insn_start         = loongarch_tr_insn_start,
> +    .translate_insn     = loongarch_tr_translate_insn,
> +    .tb_stop            = loongarch_tr_tb_stop,
> +    .disas_log          = loongarch_tr_disas_log,
> +};
> +
> +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
> +{
> +    DisasContext ctx;
> +
> +    translator_loop(&loongarch_tr_ops, &ctx.base, cs, tb, max_insns);
> +}
> +
> +void loongarch_translate_init(void)
> +{
> +    int i;
> +
> +    cpu_gpr[0] = NULL;
> +    for (i = 1; i < 32; i++) {
> +        cpu_gpr[i] = tcg_global_mem_new(cpu_env,
> +                                        offsetof(CPULoongArchState, gpr[i]),
> +                                        regnames[i]);
> +    }
> +
> +    for (i = 0; i < 32; i++) {
> +        int off = offsetof(CPULoongArchState, fpr[i]);
> +        cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]);
> +    }
> +
> +    cpu_pc = tcg_global_mem_new(cpu_env, offsetof(CPULoongArchState, pc), "pc");
> +    cpu_fcsr0 = tcg_global_mem_new_i32(cpu_env,
> +                    offsetof(CPULoongArchState, fcsr0), "fcsr0");
> +    cpu_lladdr = tcg_global_mem_new(cpu_env,
> +                    offsetof(CPULoongArchState, lladdr), "lladdr");
> +    cpu_llval = tcg_global_mem_new(cpu_env,
> +                    offsetof(CPULoongArchState, llval), "llval");
> +}
> +
> +void restore_state_to_opc(CPULoongArchState *env, TranslationBlock *tb,
> +                          target_ulong *data)
> +{
> +    env->pc = data[0];
> +}
> diff --git a/target/loongarch/translate.h b/target/loongarch/translate.h
> new file mode 100644
> index 0000000000..6cc7f1a7cd
> --- /dev/null
> +++ b/target/loongarch/translate.h
> @@ -0,0 +1,26 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/*
> + * LoongArch translation routines.
> + *
> + * Copyright (c) 2021 Loongson Technology Corporation Limited
> + */
> +
> +#ifndef TARGET_LOONGARCH_TRANSLATE_H
> +#define TARGET_LOONGARCH_TRANSLATE_H
> +
> +#include "exec/translator.h"
> +
> +typedef struct DisasContext {
> +    DisasContextBase base;
> +    target_ulong page_start;
> +    uint32_t opcode;
> +    int mem_idx;
> +} DisasContext;
> +
> +void generate_exception(DisasContext *ctx, int excp);
> +
> +extern TCGv cpu_gpr[32], cpu_pc;
> +extern TCGv_i32 cpu_fscr0;
> +extern TCGv_i64 cpu_fpr[32];
> +
> +#endif