From patchwork Tue Sep 28 03:57:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "wangyanan (Y)" X-Patchwork-Id: 1533701 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HJR8j0Qc6z9t2b for ; Tue, 28 Sep 2021 14:19:01 +1000 (AEST) Received: from localhost ([::1]:46492 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mV4a2-00060v-Sz for incoming@patchwork.ozlabs.org; Tue, 28 Sep 2021 00:18:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43946) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mV4G6-0001lh-PM; Mon, 27 Sep 2021 23:58:22 -0400 Received: from szxga01-in.huawei.com ([45.249.212.187]:2542) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mV4G1-0002NR-FD; Mon, 27 Sep 2021 23:58:22 -0400 Received: from dggemv711-chm.china.huawei.com (unknown [172.30.72.53]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4HJQgD0rdPzWBsr; Tue, 28 Sep 2021 11:56:56 +0800 (CST) Received: from dggpemm500023.china.huawei.com (7.185.36.83) by dggemv711-chm.china.huawei.com (10.1.198.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.8; Tue, 28 Sep 2021 11:58:13 +0800 Received: from DESKTOP-TMVL5KK.china.huawei.com (10.174.187.128) by dggpemm500023.china.huawei.com (7.185.36.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.8; Tue, 28 Sep 2021 11:58:12 +0800 From: Yanan Wang To: Eduardo Habkost , Paolo Bonzini , =?utf-8?q?Daniel_P_=2E_Berrang=C3=A9?= , Andrew Jones Subject: [PATCH v11 13/14] machine: Move smp_prefer_sockets to struct SMPCompatProps Date: Tue, 28 Sep 2021 11:57:54 +0800 Message-ID: <20210928035755.11684-14-wangyanan55@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 In-Reply-To: <20210928035755.11684-1-wangyanan55@huawei.com> References: <20210928035755.11684-1-wangyanan55@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.128] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To dggpemm500023.china.huawei.com (7.185.36.83) X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.187; envelope-from=wangyanan55@huawei.com; helo=szxga01-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Pierre Morel , Pankaj Gupta , Cornelia Huck , qemu-devel@nongnu.org, Yanan Wang , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, "Michael S . Tsirkin" , wanghaibin.wang@huawei.com, qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Now we have a common structure SMPCompatProps used to store information about SMP compatibility stuff, so we can also move smp_prefer_sockets there for cleaner code. No functional change intended. Signed-off-by: Yanan Wang Acked-by: David Gibson Reviewed-by: Andrew Jones Reviewed-by: Daniel P. Berrangé --- hw/arm/virt.c | 2 +- hw/core/machine.c | 2 +- hw/i386/pc_piix.c | 2 +- hw/i386/pc_q35.c | 2 +- hw/ppc/spapr.c | 2 +- hw/s390x/s390-virtio-ccw.c | 2 +- include/hw/boards.h | 3 ++- 7 files changed, 8 insertions(+), 7 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 8c13deb5db..7170aaacd5 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2815,7 +2815,7 @@ static void virt_machine_6_1_options(MachineClass *mc) virt_machine_6_2_options(mc); compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len); - mc->smp_prefer_sockets = true; + mc->smp_props.prefer_sockets = true; /* qemu ITS was introduced with 6.2 */ vmc->no_tcg_its = true; diff --git a/hw/core/machine.c b/hw/core/machine.c index 23f77201eb..e2a48aa18c 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -817,7 +817,7 @@ static void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) } else { maxcpus = maxcpus > 0 ? maxcpus : cpus; - if (mc->smp_prefer_sockets) { + if (mc->smp_props.prefer_sockets) { /* prefer sockets over cores before 6.2 */ if (sockets == 0) { cores = cores > 0 ? cores : 1; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 077644ee9c..5efb6f1949 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -431,7 +431,7 @@ static void pc_i440fx_6_1_machine_options(MachineClass *m) m->is_default = false; compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len); compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len); - m->smp_prefer_sockets = true; + m->smp_props.prefer_sockets = true; } DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL, diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 2d97c0ab3e..9eae40e32c 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -371,7 +371,7 @@ static void pc_q35_6_1_machine_options(MachineClass *m) m->alias = NULL; compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len); compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len); - m->smp_prefer_sockets = true; + m->smp_props.prefer_sockets = true; } DEFINE_Q35_MACHINE(v6_1, "pc-q35-6.1", NULL, diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index a481fade51..efdea43c0d 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -4702,7 +4702,7 @@ static void spapr_machine_6_1_class_options(MachineClass *mc) { spapr_machine_6_2_class_options(mc); compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len); - mc->smp_prefer_sockets = true; + mc->smp_props.prefer_sockets = true; } DEFINE_SPAPR_MACHINE(6_1, "6.1", false); diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 5401c985cf..653587ea62 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -814,7 +814,7 @@ static void ccw_machine_6_1_class_options(MachineClass *mc) { ccw_machine_6_2_class_options(mc); compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len); - mc->smp_prefer_sockets = true; + mc->smp_props.prefer_sockets = true; } DEFINE_CCW_MACHINE(6_1, "6.1", false); diff --git a/include/hw/boards.h b/include/hw/boards.h index fa284e01e9..5adbcbb99b 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -110,9 +110,11 @@ typedef struct { /** * SMPCompatProps: + * @prefer_sockets - whether sockets are preferred over cores in smp parsing * @dies_supported - whether dies are supported by the machine */ typedef struct { + bool prefer_sockets; bool dies_supported; } SMPCompatProps; @@ -250,7 +252,6 @@ struct MachineClass { bool nvdimm_supported; bool numa_mem_supported; bool auto_enable_numa; - bool smp_prefer_sockets; SMPCompatProps smp_props; const char *default_ram_id;