From patchwork Mon Aug 23 18:11:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Tomsich X-Patchwork-Id: 1519894 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=vrull-eu.20150623.gappssmtp.com header.i=@vrull-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=rG3VOmiL; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GtgPz1dRWz9sX5 for ; Tue, 24 Aug 2021 04:15:03 +1000 (AEST) Received: from localhost ([::1]:46512 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mIETM-0002SH-Ul for incoming@patchwork.ozlabs.org; Mon, 23 Aug 2021 14:15:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38660) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mIEQJ-0006U6-0V for qemu-devel@nongnu.org; Mon, 23 Aug 2021 14:11:51 -0400 Received: from mail-lf1-x12b.google.com ([2a00:1450:4864:20::12b]:46780) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mIEQA-0008Lt-I4 for qemu-devel@nongnu.org; Mon, 23 Aug 2021 14:11:50 -0400 Received: by mail-lf1-x12b.google.com with SMTP id u22so39643164lfq.13 for ; Mon, 23 Aug 2021 11:11:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull-eu.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=09rR6Bh5rkgagw/gOvVmMWcHTIp2sFfUooYG6jgD/tE=; b=rG3VOmiLqqY+YpOgxLwiRkM9Ct8z14SNFc5US6AICOo2ITpimezcy4Xi5UHI6FBixf lNZPSUV3/Qas8ZJIaeVBtjI4BEehps4EX1TlpWW5EOgyTT2VFTNYMtJXNLOUcq5yWgs2 +eeRBlk8c1V0HxrF0qEFOv1ghGXwrz7SUCKkL3MO/NASUDXvVH8YTHwDLNrFUA380jk1 D6MjT4M3PhcXO8agZGUXLkPcfFnF0MXHCGZobxYXTNXrg/Q7Wj22VE2HzK4ke/CYagwi NucfR7pUT1QQlj1KTTi0T5SSFMQgElkZBGbCgoC7VNMT+AJOZ1e8AYqagIhLul5zoXl6 hYeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=09rR6Bh5rkgagw/gOvVmMWcHTIp2sFfUooYG6jgD/tE=; b=W91AW75kR7c6Tgs6AZdIADzkvMK5r2krZ9vnjGHnPzXAvFxvzY/3nPx64EGktibPHM er5pSWGANC05e0Yze43M1KkbTc2FGd8uCDNCMNitilGEWMrgMdZKT02xkJp4+QGAJI57 trJHQolrp+Y31Vb0hsp4Sy9x+Ffc86Io84bGoo+62ynrb8WoS6AiAT6XR/JQCUyStcgT hMKxUSo0IiQ0Ft8sKP0LC58z+oSOG3W9e0M0n8rDfuenKucOnkxI7zZAxNhJ6hXgl1H0 StXb3w/F5iFSscBcxHzaZDxZSIhGXnd7CS5nNAHJ3sjgO06Wj68UJz50nrXYu4j796AR +OVw== X-Gm-Message-State: AOAM531lA+EehSOqv/DSE1xy5nkq34T3CS2jdI1BG+Qqsp9UF1YiTo5L AeJG/TcLCqiu1/EP9xeSRo8Y9GoIiXgWVeBE X-Google-Smtp-Source: ABdhPJzbSwAXb2ZVaimo58B+4PcEjy8tdPmLH4+w+9SBfd78tldh5sB9zh2obDGU2DenMDxjfxMEig== X-Received: by 2002:a19:2d0e:: with SMTP id k14mr25223335lfj.409.1629742300785; Mon, 23 Aug 2021 11:11:40 -0700 (PDT) Received: from localhost.localdomain ([2a01:4f9:3a:1e26::2]) by smtp.gmail.com with ESMTPSA id w26sm1511739lfk.223.2021.08.23.11.11.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 11:11:40 -0700 (PDT) From: Philipp Tomsich To: qemu-devel@nongnu.org Subject: [PATCH v4 06/14] target/riscv: Reassign instructions to the Zbs-extension Date: Mon, 23 Aug 2021 20:11:24 +0200 Message-Id: <20210823181132.2205367-7-philipp.tomsich@vrull.eu> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210823181132.2205367-1-philipp.tomsich@vrull.eu> References: <20210823181132.2205367-1-philipp.tomsich@vrull.eu> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12b; envelope-from=philipp.tomsich@vrull.eu; helo=mail-lf1-x12b.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Kito Cheng , Richard Henderson , Philipp Tomsich Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The following instructions are part of Zbs: - b{set,clr,ext,inv} - b{set,clr,ext,inv}i Signed-off-by: Philipp Tomsich Reviewed-by: Richard Henderson --- (no changes since v3) Changes in v3: - The changes to the Zbs instructions (i.e. the REQUIRE_ZBS macro) and its use for qualifying the Zba instructions) are moved into a separate commit. target/riscv/insn32.decode | 17 +++++++++-------- target/riscv/insn_trans/trans_rvb.c.inc | 24 +++++++++++++++--------- 2 files changed, 24 insertions(+), 17 deletions(-) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 7e38477553..1166e7f648 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -688,19 +688,11 @@ min 0000101 .......... 100 ..... 0110011 @r minu 0000101 .......... 101 ..... 0110011 @r max 0000101 .......... 110 ..... 0110011 @r maxu 0000101 .......... 111 ..... 0110011 @r -bset 0010100 .......... 001 ..... 0110011 @r -bclr 0100100 .......... 001 ..... 0110011 @r -binv 0110100 .......... 001 ..... 0110011 @r -bext 0100100 .......... 101 ..... 0110011 @r ror 0110000 .......... 101 ..... 0110011 @r rol 0110000 .......... 001 ..... 0110011 @r grev 0110100 .......... 101 ..... 0110011 @r gorc 0010100 .......... 101 ..... 0110011 @r -bseti 00101. ........... 001 ..... 0010011 @sh -bclri 01001. ........... 001 ..... 0010011 @sh -binvi 01101. ........... 001 ..... 0010011 @sh -bexti 01001. ........... 101 ..... 0010011 @sh rori 01100. ........... 101 ..... 0010011 @sh grevi 01101. ........... 101 ..... 0010011 @sh gorci 00101. ........... 101 ..... 0010011 @sh @@ -721,3 +713,12 @@ roriw 0110000 .......... 101 ..... 0011011 @sh5 greviw 0110100 .......... 101 ..... 0011011 @sh5 gorciw 0010100 .......... 101 ..... 0011011 @sh5 +# *** RV32 Zbs Standard Extension *** +bclr 0100100 .......... 001 ..... 0110011 @r +bclri 01001. ........... 001 ..... 0010011 @sh +bext 0100100 .......... 101 ..... 0110011 @r +bexti 01001. ........... 101 ..... 0010011 @sh +binv 0110100 .......... 001 ..... 0110011 @r +binvi 01101. ........... 001 ..... 0010011 @sh +bset 0010100 .......... 001 ..... 0110011 @r +bseti 00101. ........... 001 ..... 0010011 @sh diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_trans/trans_rvb.c.inc index ac706349f5..21d713df27 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -1,5 +1,5 @@ /* - * RISC-V translation routines for the RVB draft and Zba Standard Extension. + * RISC-V translation routines for the RVB draft Zb[as] Standard Extension. * * Copyright (c) 2020 Kito Cheng, kito.cheng@sifive.com * Copyright (c) 2020 Frank Chang, frank.chang@sifive.com @@ -24,6 +24,12 @@ } \ } while (0) +#define REQUIRE_ZBS(ctx) do { \ + if (!RISCV_CPU(ctx->cs)->cfg.ext_zbs) { \ + return false; \ + } \ +} while (0) + static bool trans_clz(DisasContext *ctx, arg_clz *a) { REQUIRE_EXT(ctx, RVB); @@ -116,49 +122,49 @@ static bool trans_sext_h(DisasContext *ctx, arg_sext_h *a) static bool trans_bset(DisasContext *ctx, arg_bset *a) { - REQUIRE_EXT(ctx, RVB); + REQUIRE_ZBS(ctx); return gen_shift(ctx, a, gen_bset); } static bool trans_bseti(DisasContext *ctx, arg_bseti *a) { - REQUIRE_EXT(ctx, RVB); + REQUIRE_ZBS(ctx); return gen_shifti(ctx, a, gen_bset); } static bool trans_bclr(DisasContext *ctx, arg_bclr *a) { - REQUIRE_EXT(ctx, RVB); + REQUIRE_ZBS(ctx); return gen_shift(ctx, a, gen_bclr); } static bool trans_bclri(DisasContext *ctx, arg_bclri *a) { - REQUIRE_EXT(ctx, RVB); + REQUIRE_ZBS(ctx); return gen_shifti(ctx, a, gen_bclr); } static bool trans_binv(DisasContext *ctx, arg_binv *a) { - REQUIRE_EXT(ctx, RVB); + REQUIRE_ZBS(ctx); return gen_shift(ctx, a, gen_binv); } static bool trans_binvi(DisasContext *ctx, arg_binvi *a) { - REQUIRE_EXT(ctx, RVB); + REQUIRE_ZBS(ctx); return gen_shifti(ctx, a, gen_binv); } static bool trans_bext(DisasContext *ctx, arg_bext *a) { - REQUIRE_EXT(ctx, RVB); + REQUIRE_ZBS(ctx); return gen_shift(ctx, a, gen_bext); } static bool trans_bexti(DisasContext *ctx, arg_bexti *a) { - REQUIRE_EXT(ctx, RVB); + REQUIRE_ZBS(ctx); return gen_shifti(ctx, a, gen_bext); }