From patchwork Thu Aug 5 02:53:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: LIU Zhiwei X-Patchwork-Id: 1513712 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GgCxZ37s9z9s1l for ; Thu, 5 Aug 2021 12:59:14 +1000 (AEST) Received: from localhost ([::1]:41198 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mBTbE-0003vd-4I for incoming@patchwork.ozlabs.org; Wed, 04 Aug 2021 22:59:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47902) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mBTZi-0000uX-Hg; Wed, 04 Aug 2021 22:57:38 -0400 Received: from out28-1.mail.aliyun.com ([115.124.28.1]:44010) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mBTZg-0007HX-MM; Wed, 04 Aug 2021 22:57:38 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.08995347|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.13775-0.000181703-0.862068; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047194; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.KvYntve_1628132252; Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.KvYntve_1628132252) by smtp.aliyun-inc.com(10.147.40.2); Thu, 05 Aug 2021 10:57:32 +0800 From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [RFC PATCH 05/13] target/riscv: Support UXL32 for shift instruction Date: Thu, 5 Aug 2021 10:53:04 +0800 Message-Id: <20210805025312.15720-6-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210805025312.15720-1-zhiwei_liu@c-sky.com> References: <20210805025312.15720-1-zhiwei_liu@c-sky.com> Received-SPF: none client-ip=115.124.28.1; envelope-from=zhiwei_liu@c-sky.com; helo=out28-1.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Reuse 32-bit right shift instructions. Signed-off-by: LIU Zhiwei --- target/riscv/insn_trans/trans_rvi.c.inc | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_trans/trans_rvi.c.inc index 6201c07795..698a28731e 100644 --- a/target/riscv/insn_trans/trans_rvi.c.inc +++ b/target/riscv/insn_trans/trans_rvi.c.inc @@ -303,11 +303,17 @@ static bool trans_slli(DisasContext *ctx, arg_slli *a) static bool trans_srli(DisasContext *ctx, arg_srli *a) { + if (ctx->uxl32) { + return trans_srliw(ctx, a); + } return gen_shifti(ctx, a, tcg_gen_shr_tl); } static bool trans_srai(DisasContext *ctx, arg_srai *a) { + if (ctx->uxl32) { + return trans_sraiw(ctx, a); + } return gen_shifti(ctx, a, tcg_gen_sar_tl); } @@ -343,11 +349,17 @@ static bool trans_xor(DisasContext *ctx, arg_xor *a) static bool trans_srl(DisasContext *ctx, arg_srl *a) { + if (ctx->uxl32) { + return trans_srlw(ctx, a); + } return gen_shift(ctx, a, &tcg_gen_shr_tl); } static bool trans_sra(DisasContext *ctx, arg_sra *a) { + if (ctx->uxl32) { + return trans_sraw(ctx, a); + } return gen_shift(ctx, a, &tcg_gen_sar_tl); }