From patchwork Tue Aug 3 08:05:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "wangyanan (Y)" X-Patchwork-Id: 1512779 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Gf6tx1gVYz9sRR for ; Tue, 3 Aug 2021 18:08:09 +1000 (AEST) Received: from localhost ([::1]:57700 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mApT4-0006fK-TL for incoming@patchwork.ozlabs.org; Tue, 03 Aug 2021 04:08:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34648) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mApQq-0000wl-C1 for qemu-devel@nongnu.org; Tue, 03 Aug 2021 04:05:48 -0400 Received: from szxga08-in.huawei.com ([45.249.212.255]:2265) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mApQl-00048x-KR for qemu-devel@nongnu.org; Tue, 03 Aug 2021 04:05:48 -0400 Received: from dggemv703-chm.china.huawei.com (unknown [172.30.72.55]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4Gf6r06F8mz1CRxJ; Tue, 3 Aug 2021 16:05:36 +0800 (CST) Received: from dggpemm500023.china.huawei.com (7.185.36.83) by dggemv703-chm.china.huawei.com (10.3.19.46) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Tue, 3 Aug 2021 16:05:41 +0800 Received: from DESKTOP-TMVL5KK.china.huawei.com (10.174.187.128) by dggpemm500023.china.huawei.com (7.185.36.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Tue, 3 Aug 2021 16:05:40 +0800 From: Yanan Wang To: Subject: [PATCH for-6.2 v4 08/14] machine: Tweak the order of topology members in struct CpuTopology Date: Tue, 3 Aug 2021 16:05:21 +0800 Message-ID: <20210803080527.156556-9-wangyanan55@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 In-Reply-To: <20210803080527.156556-1-wangyanan55@huawei.com> References: <20210803080527.156556-1-wangyanan55@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.128] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To dggpemm500023.china.huawei.com (7.185.36.83) X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.255; envelope-from=wangyanan55@huawei.com; helo=szxga08-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Cornelia Huck , =?utf-8?q?Daniel_P_=2E_Berrang=C3=A9?= , Eduardo Habkost , Pierre Morel , "Michael S . Tsirkin" , Pankaj Gupta , Richard Henderson , Greg Kurz , Halil Pasic , yuzenghui@huawei.com, wanghaibin.wang@huawei.com, Thomas Huth , Paolo Bonzini , Yanan Wang , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Now that all the possible topology parameters are integrated in struct CpuTopology, tweak the order of topology members to be "cpus/sockets/ dies/cores/threads/maxcpus" for readability and consistency. We also tweak the comment by adding explanation of dies parameter. Reviewed-by: Pankaj Gupta Reviewed-by: Andrew Jones Signed-off-by: Yanan Wang --- hw/core/machine.c | 8 ++++---- include/hw/boards.h | 7 ++++--- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index e13a8f2f34..46eaf522ee 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -826,11 +826,11 @@ static void machine_get_smp(Object *obj, Visitor *v, const char *name, { MachineState *ms = MACHINE(obj); SMPConfiguration *config = &(SMPConfiguration){ - .has_cores = true, .cores = ms->smp.cores, + .has_cpus = true, .cpus = ms->smp.cpus, .has_sockets = true, .sockets = ms->smp.sockets, .has_dies = true, .dies = ms->smp.dies, + .has_cores = true, .cores = ms->smp.cores, .has_threads = true, .threads = ms->smp.threads, - .has_cpus = true, .cpus = ms->smp.cpus, .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, }; if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { @@ -1057,10 +1057,10 @@ static void machine_initfn(Object *obj) /* default to mc->default_cpus */ ms->smp.cpus = mc->default_cpus; ms->smp.max_cpus = mc->default_cpus; - ms->smp.cores = 1; + ms->smp.sockets = 1; ms->smp.dies = 1; + ms->smp.cores = 1; ms->smp.threads = 1; - ms->smp.sockets = 1; } static void machine_finalize(Object *obj) diff --git a/include/hw/boards.h b/include/hw/boards.h index 2ae039b74f..2a1bba86c0 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -275,17 +275,18 @@ typedef struct DeviceMemoryState { /** * CpuTopology: * @cpus: the number of present logical processors on the machine - * @cores: the number of cores in one package - * @threads: the number of threads in one core * @sockets: the number of sockets on the machine + * @dies: the number of dies in one socket + * @cores: the number of cores in one die + * @threads: the number of threads in one core * @max_cpus: the maximum number of logical processors on the machine */ typedef struct CpuTopology { unsigned int cpus; + unsigned int sockets; unsigned int dies; unsigned int cores; unsigned int threads; - unsigned int sockets; unsigned int max_cpus; } CpuTopology;