Message ID | 20210506163941.106984-4-lucas.araujo@eldorado.org.br |
---|---|
State | New |
Headers | show |
Series | hw/ppc: code motion to compile without TCG | expand |
On Thu, May 06, 2021 at 01:39:40PM -0300, Lucas Mateus Castro (alqotel) wrote: > Moved the function ppc_store from mmu-hash64.c to misc_helper.c and the > prototype from mmu-hash64.h to cpu.h as it is a more appropriate place, > but it will have to have its implementation moved to a new file as > misc_helper.c should not be compiled in a !TCG environment. > > Signed-off-by: Lucas Mateus Castro (alqotel) > <lucas.araujo@eldorado.org.br> Applied to ppc-for-6.1, thanks. > --- > target/ppc/cpu.h | 1 + > target/ppc/misc_helper.c | 10 ++++++++++ > target/ppc/mmu-hash64.c | 10 ---------- > target/ppc/mmu-hash64.h | 1 - > 4 files changed, 11 insertions(+), 11 deletions(-) > > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > index 733a2168c4..a976e7f7b0 100644 > --- a/target/ppc/cpu.h > +++ b/target/ppc/cpu.h > @@ -1297,6 +1297,7 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value); > void ppc_store_ptcr(CPUPPCState *env, target_ulong value); > #endif /* !defined(CONFIG_USER_ONLY) */ > void ppc_store_msr(CPUPPCState *env, target_ulong value); > +void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val); > > void ppc_cpu_list(void); > > diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c > index 002958be26..08a31da289 100644 > --- a/target/ppc/misc_helper.c > +++ b/target/ppc/misc_helper.c > @@ -261,6 +261,16 @@ void ppc_store_msr(CPUPPCState *env, target_ulong value) > hreg_store_msr(env, value, 0); > } > > +void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) > +{ > + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); > + CPUPPCState *env = &cpu->env; > + > + env->spr[SPR_LPCR] = val & pcc->lpcr_mask; > + /* The gtse bit affects hflags */ > + hreg_compute_hflags(env); > +} > + > /* > * This code is lifted from MacOnLinux. It is called whenever THRM1,2 > * or 3 is read an fixes up the values in such a way that will make > diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c > index be3596f27b..c4a4bc7cd2 100644 > --- a/target/ppc/mmu-hash64.c > +++ b/target/ppc/mmu-hash64.c > @@ -1120,16 +1120,6 @@ void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu, target_ulong ptex, > cpu->env.tlb_need_flush = TLB_NEED_GLOBAL_FLUSH | TLB_NEED_LOCAL_FLUSH; > } > > -void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) > -{ > - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); > - CPUPPCState *env = &cpu->env; > - > - env->spr[SPR_LPCR] = val & pcc->lpcr_mask; > - /* The gtse bit affects hflags */ > - hreg_compute_hflags(env); > -} > - > void helper_store_lpcr(CPUPPCState *env, target_ulong val) > { > PowerPCCPU *cpu = env_archcpu(env); > diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h > index 5dfd7f8b93..4b8b8e7950 100644 > --- a/target/ppc/mmu-hash64.h > +++ b/target/ppc/mmu-hash64.h > @@ -15,7 +15,6 @@ void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu, > target_ulong pte0, target_ulong pte1); > unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu, > uint64_t pte0, uint64_t pte1); > -void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val); > void ppc_hash64_init(PowerPCCPU *cpu); > void ppc_hash64_finalize(PowerPCCPU *cpu); > #endif
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 733a2168c4..a976e7f7b0 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1297,6 +1297,7 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value); void ppc_store_ptcr(CPUPPCState *env, target_ulong value); #endif /* !defined(CONFIG_USER_ONLY) */ void ppc_store_msr(CPUPPCState *env, target_ulong value); +void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val); void ppc_cpu_list(void); diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index 002958be26..08a31da289 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -261,6 +261,16 @@ void ppc_store_msr(CPUPPCState *env, target_ulong value) hreg_store_msr(env, value, 0); } +void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) +{ + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); + CPUPPCState *env = &cpu->env; + + env->spr[SPR_LPCR] = val & pcc->lpcr_mask; + /* The gtse bit affects hflags */ + hreg_compute_hflags(env); +} + /* * This code is lifted from MacOnLinux. It is called whenever THRM1,2 * or 3 is read an fixes up the values in such a way that will make diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index be3596f27b..c4a4bc7cd2 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -1120,16 +1120,6 @@ void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu, target_ulong ptex, cpu->env.tlb_need_flush = TLB_NEED_GLOBAL_FLUSH | TLB_NEED_LOCAL_FLUSH; } -void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) -{ - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); - CPUPPCState *env = &cpu->env; - - env->spr[SPR_LPCR] = val & pcc->lpcr_mask; - /* The gtse bit affects hflags */ - hreg_compute_hflags(env); -} - void helper_store_lpcr(CPUPPCState *env, target_ulong val) { PowerPCCPU *cpu = env_archcpu(env); diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h index 5dfd7f8b93..4b8b8e7950 100644 --- a/target/ppc/mmu-hash64.h +++ b/target/ppc/mmu-hash64.h @@ -15,7 +15,6 @@ void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu, target_ulong pte0, target_ulong pte1); unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu, uint64_t pte0, uint64_t pte1); -void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val); void ppc_hash64_init(PowerPCCPU *cpu); void ppc_hash64_finalize(PowerPCCPU *cpu); #endif
Moved the function ppc_store from mmu-hash64.c to misc_helper.c and the prototype from mmu-hash64.h to cpu.h as it is a more appropriate place, but it will have to have its implementation moved to a new file as misc_helper.c should not be compiled in a !TCG environment. Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> --- target/ppc/cpu.h | 1 + target/ppc/misc_helper.c | 10 ++++++++++ target/ppc/mmu-hash64.c | 10 ---------- target/ppc/mmu-hash64.h | 1 - 4 files changed, 11 insertions(+), 11 deletions(-)