From patchwork Thu Mar 11 22:18:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 1451557 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DxNjz2v93z9sS8 for ; Fri, 12 Mar 2021 09:22:47 +1100 (AEDT) Received: from localhost ([::1]:59508 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKThd-0007Qg-F9 for incoming@patchwork.ozlabs.org; Thu, 11 Mar 2021 17:22:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:35846) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKTdh-0004JM-Cw for qemu-devel@nongnu.org; Thu, 11 Mar 2021 17:18:41 -0500 Received: from mout.kundenserver.de ([212.227.126.134]:55263) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKTdZ-00049h-Tm for qemu-devel@nongnu.org; Thu, 11 Mar 2021 17:18:41 -0500 Received: from localhost.localdomain ([82.142.6.26]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.167]) with ESMTPSA (Nemesis) id 1MKMIR-1l1Zbk3Bwl-00Lqta; Thu, 11 Mar 2021 23:18:31 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PULL 2/4] target/m68k: don't set SSW ATC bit for physical bus errors Date: Thu, 11 Mar 2021 23:18:25 +0100 Message-Id: <20210311221827.2595898-3-laurent@vivier.eu> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210311221827.2595898-1-laurent@vivier.eu> References: <20210311221827.2595898-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:aziqEioKNGz8LrR5YjW7FPKJaB65L1LkFeuDWZlEiJ+UFC40APB QE/I3qjaTCwId0jqi45vEGeD6to+dYV3lgJr5jyTJRI4ay9daFgVLIBCgjO4CfSiR3C94Ix BH3qMv8uFHwdZ7MkGfD8DFDdJaW0OsMEAjszt2b6xpPSJgqAfxwclGaeo1/cr7lN+8UToD6 q7WCY0QP7wwUtxxA5AFPA== X-UI-Out-Filterresults: notjunk:1;V03:K0:+pfpjRs9zEA=:eVn7Z4cScjlgMNyEwmLXfb n6SirhHWSoVptHi5WxNiq5Y1xutT64gm8rfluGRFDsyMkN1/TAFAnZDsQu93NVG8zY++9i6R4 KXu/TdQetqEgbfyIF1RP/HS0GXS7AaxGJz35DrTTDGEaY6dKGday1GKPhMExs92nHzMm1lBuE n2TvJVRkqTjeW3vK2IRBc/GUUifwX1JjGbW7HN3+v2/VQSyJFm4KbmRjeD1z0jt0SBD0VxFq8 b3Rod1hO9Vux/kvufegOyXVoCKXWEPxfyBFGJfxgv2OWGLPIYSsbzUvhY0alcs2qCAyWHjB21 WWk/Xg9QUNmO8LE/GmGNi4GZWdq44z0+3erYtDCkE8jp+WaPevLz0ZPjMiJZy/WS0Xa9NZjpE UkqbqEbNyCgJ70aEeKdRQ/b8h6ziSjzpNz6MDVV5Zfn39HTDHG3bAdaSJRcZjvtOcnj0fHM7f y2awSK2ZGg== Received-SPF: none client-ip=212.227.126.134; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , Laurent Vivier Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Mark Cave-Ayland If a NuBus slot doesn't contain a card, the Quadra hardware generates a physical bus error if the CPU attempts to access the slot address space. Both Linux and MacOS use a separate bus error handler during NuBus accesses in order to detect and recover when addressing empty slots. According to the MC68040 users manual the ATC bit of the SSW is used to distinguish between ATC faults and physical bus errors. MacOS specifically checks the stack frame generated by a NuBus error and panics if the SSW ATC bit is set. Update m68k_cpu_transaction_failed() so that the SSW ATC bit is not set if the memory API returns MEMTX_DECODE_ERROR which will be used to indicate that an access to an empty NuBus slot occurred. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20210308121155.2476-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier --- target/m68k/op_helper.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 730cdf774445..5f981e5bf628 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -468,7 +468,17 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, if (m68k_feature(env, M68K_FEATURE_M68040)) { env->mmu.mmusr = 0; - env->mmu.ssw |= M68K_ATC_040; + + /* + * According to the MC68040 users manual the ATC bit of the SSW is + * used to distinguish between ATC faults and physical bus errors. + * In the case of a bus error e.g. during nubus read from an empty + * slot this bit should not be set + */ + if (response != MEMTX_DECODE_ERROR) { + env->mmu.ssw |= M68K_ATC_040; + } + /* FIXME: manage MMU table access error */ env->mmu.ssw &= ~M68K_TM_040; if (env->sr & SR_S) { /* SUPERVISOR */