From patchwork Mon Mar 8 21:24:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 1449400 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DvWc45CDNz9sWQ for ; Tue, 9 Mar 2021 08:26:12 +1100 (AEDT) Received: from localhost ([::1]:35284 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lJNOE-0005WY-QH for incoming@patchwork.ozlabs.org; Mon, 08 Mar 2021 16:26:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:47070) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJNNT-0005R0-8T for qemu-devel@nongnu.org; Mon, 08 Mar 2021 16:25:23 -0500 Received: from mout.kundenserver.de ([217.72.192.74]:35553) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJNNQ-00081F-RV for qemu-devel@nongnu.org; Mon, 08 Mar 2021 16:25:23 -0500 Received: from localhost.localdomain ([82.252.131.214]) by mrelayeu.kundenserver.de (mreue107 [212.227.15.183]) with ESMTPSA (Nemesis) id 1MV5KC-1l91W83dvK-00SAYB; Mon, 08 Mar 2021 22:25:07 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PATCH v6 3/5] m68k: add an interrupt controller Date: Mon, 8 Mar 2021 22:24:59 +0100 Message-Id: <20210308212501.650740-4-laurent@vivier.eu> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210308212501.650740-1-laurent@vivier.eu> References: <20210308212501.650740-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:X4ElFHxynLjV6wLztPscrQ3Ngk1G430L620YX6jKk+SA/hYC6rI c1/PGrPQWKACLI8Th/wRXJEEHgLMfdnOiooog9m02aDmbnq3rqBq3f3XzqPljPMGz4vV0t2 wAlrz5LyGmV4TW9kzgSlKtrkMP2Ike5iEfpG2FUaneqmn4a0w4lqSbh0tbV8FcVh11rPeo7 NdrTO44Aoct6fNmKE/ySQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:OlzSAa+qdhc=:WLD/RoNX6s4hnkeYqMucoD 4de6qtZnTkGBhj9pSR0sfCRDoXjK2B/U1kigztE1oCpj+QLZSTRq812llHumyZ6IzcTpnRzPS zG4K5/ViKnPvDBYHDpf+wT8sPTVX8uWxzt425oucunlAi646cWBwprE9T7B8plS0f7mFyR4Up +dzS+ohSRR8MW8ad1/5bIWB264X2TLoDi5TDCAVvo2aF4MVXQEyP5usBTmtX/yqz1g7CZybsX H9MzDmAxdRUutECN6DBEDDc4JwrFNfUqmbf4ttbKSRA8cMHT3DU0qmXS6UsCT2P3RTzCwa8ti 2OTMWfprXHn7qCe54m9TB+JKaM+KCzNjktelMcAPFTzjkISFOnnJXGUG62O1kua/crlvCDT2G 55aujXepHnSl/KmaHZ65J/6hKaSOY/yDcz4jCd8JqJzq+B2kM4zKrY6+r4II8QQnFrlQFR5wI Wv7egBluSw== Received-SPF: none client-ip=217.72.192.74; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Laurent Vivier Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" A (generic) copy of the GLUE device we already have for q800 to use with the m68k-virt machine. The q800 one would disappear in the future as q800 uses actually the djMEMC controller. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- include/hw/intc/m68k_irqc.h | 41 +++++++++++++ hw/intc/m68k_irqc.c | 119 ++++++++++++++++++++++++++++++++++++ hw/intc/Kconfig | 3 + hw/intc/meson.build | 1 + 4 files changed, 164 insertions(+) create mode 100644 include/hw/intc/m68k_irqc.h create mode 100644 hw/intc/m68k_irqc.c diff --git a/include/hw/intc/m68k_irqc.h b/include/hw/intc/m68k_irqc.h new file mode 100644 index 000000000000..dbcfcfc2e000 --- /dev/null +++ b/include/hw/intc/m68k_irqc.h @@ -0,0 +1,41 @@ +/* + * SPDX-License-Identifer: GPL-2.0-or-later + * + * QEMU Motorola 680x0 IRQ Controller + * + * (c) 2020 Laurent Vivier + * + */ + +#ifndef M68K_IRQC_H +#define M68K_IRQC_H + +#include "hw/sysbus.h" + +#define TYPE_M68K_IRQC "m68k-irq-controller" +#define M68K_IRQC(obj) OBJECT_CHECK(M68KIRQCState, (obj), \ + TYPE_M68K_IRQC) + +#define M68K_IRQC_AUTOVECTOR_BASE 25 + +enum { + M68K_IRQC_LEVEL_1 = 0, + M68K_IRQC_LEVEL_2, + M68K_IRQC_LEVEL_3, + M68K_IRQC_LEVEL_4, + M68K_IRQC_LEVEL_5, + M68K_IRQC_LEVEL_6, + M68K_IRQC_LEVEL_7, +}; +#define M68K_IRQC_LEVEL_NUM (M68K_IRQC_LEVEL_7 - M68K_IRQC_LEVEL_1 + 1) + +typedef struct M68KIRQCState { + SysBusDevice parent_obj; + + uint8_t ipr; + + /* statistics */ + uint64_t stats_irq_count[M68K_IRQC_LEVEL_NUM]; +} M68KIRQCState; + +#endif diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c new file mode 100644 index 000000000000..2133d2a698ab --- /dev/null +++ b/hw/intc/m68k_irqc.c @@ -0,0 +1,119 @@ +/* + * SPDX-License-Identifer: GPL-2.0-or-later + * + * QEMU Motorola 680x0 IRQ Controller + * + * (c) 2020 Laurent Vivier + * + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "migration/vmstate.h" +#include "monitor/monitor.h" +#include "hw/nmi.h" +#include "hw/intc/intc.h" +#include "hw/intc/m68k_irqc.h" + + +static bool m68k_irqc_get_statistics(InterruptStatsProvider *obj, + uint64_t **irq_counts, unsigned int *nb_irqs) +{ + M68KIRQCState *s = M68K_IRQC(obj); + + *irq_counts = s->stats_irq_count; + *nb_irqs = ARRAY_SIZE(s->stats_irq_count); + return true; +} + +static void m68k_irqc_print_info(InterruptStatsProvider *obj, Monitor *mon) +{ + M68KIRQCState *s = M68K_IRQC(obj); + monitor_printf(mon, "m68k-irqc: ipr=0x%x\n", s->ipr); +} + +static void m68k_set_irq(void *opaque, int irq, int level) +{ + M68KIRQCState *s = opaque; + M68kCPU *cpu = M68K_CPU(first_cpu); + int i; + + if (level) { + s->ipr |= 1 << irq; + s->stats_irq_count[irq]++; + } else { + s->ipr &= ~(1 << irq); + } + + for (i = M68K_IRQC_LEVEL_7; i >= M68K_IRQC_LEVEL_1; i--) { + if ((s->ipr >> i) & 1) { + m68k_set_irq_level(cpu, i + 1, i + M68K_IRQC_AUTOVECTOR_BASE); + return; + } + } + m68k_set_irq_level(cpu, 0, 0); +} + +static void m68k_irqc_reset(DeviceState *d) +{ + M68KIRQCState *s = M68K_IRQC(d); + int i; + + s->ipr = 0; + for (i = 0; i < ARRAY_SIZE(s->stats_irq_count); i++) { + s->stats_irq_count[i] = 0; + } +} + +static void m68k_irqc_instance_init(Object *obj) +{ + qdev_init_gpio_in(DEVICE(obj), m68k_set_irq, M68K_IRQC_LEVEL_NUM); +} + +static void m68k_nmi(NMIState *n, int cpu_index, Error **errp) +{ + m68k_set_irq(n, M68K_IRQC_LEVEL_7, 1); +} + +static const VMStateDescription vmstate_m68k_irqc = { + .name = "m68k-irqc", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT8(ipr, M68KIRQCState), + VMSTATE_END_OF_LIST() + } +}; + +static void m68k_irqc_class_init(ObjectClass *oc, void *data) + { + DeviceClass *dc = DEVICE_CLASS(oc); + NMIClass *nc = NMI_CLASS(oc); + InterruptStatsProviderClass *ic = INTERRUPT_STATS_PROVIDER_CLASS(oc); + + nc->nmi_monitor_handler = m68k_nmi; + dc->reset = m68k_irqc_reset; + dc->vmsd = &vmstate_m68k_irqc; + ic->get_statistics = m68k_irqc_get_statistics; + ic->print_info = m68k_irqc_print_info; +} + +static const TypeInfo m68k_irqc_type_info = { + .name = TYPE_M68K_IRQC, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(M68KIRQCState), + .instance_init = m68k_irqc_instance_init, + .class_init = m68k_irqc_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_NMI }, + { TYPE_INTERRUPT_STATS_PROVIDER }, + { } + }, +}; + +static void q800_irq_register_types(void) +{ + type_register_static(&m68k_irqc_type_info); +} + +type_init(q800_irq_register_types); diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index c4f8642dae8e..fdb4a30b98e8 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -67,3 +67,6 @@ config SIFIVE_PLIC config GOLDFISH_PIC bool + +config M68K_IRQC + bool diff --git a/hw/intc/meson.build b/hw/intc/meson.build index 5d0f5d1b3812..fb39e19d3ef8 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -58,3 +58,4 @@ specific_ss.add(when: 'CONFIG_XIVE', if_true: files('xive.c')) specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], if_true: files('spapr_xive_kvm.c')) specific_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c')) +specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c'))