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[31.208.27.151]) by smtp.gmail.com with ESMTPSA id e25sm2356745lfc.40.2021.01.19.05.01.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 05:01:57 -0800 (PST) From: Francisco Iglesias To: qemu-devel@nongnu.org, frasse.iglesias@gmail.com Subject: [RFC PATCH v1 1/3] hw: ssi: Introduce ssi_txfifo_transfer Date: Tue, 19 Jan 2021 14:01:53 +0100 Message-Id: <20210119130155.30194-2-frasse.iglesias@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210119130155.30194-1-frasse.iglesias@gmail.com> References: <20210119130155.30194-1-frasse.iglesias@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22e; envelope-from=frasse.iglesias@gmail.com; helo=mail-lj1-x22e.google.com X-Spam_score_int: -1020 X-Spam_score: -102.1 X-Spam_bar: --------------------------------------------------- X-Spam_report: (-102.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_WELCOMELIST=-0.01, USER_IN_WHITELIST=-100 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, peter.maydell@linaro.org, alistair@alistair23.me, bin.meng@windriver.com, mreitz@redhat.com, alistair23@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This patch introduces ssi_txfifo_transfer aimed to be used by SPI controllers transfering through a txfifo. When interacting with a SPI flash (m25p80), ssi_txfifo_transfer will toggle the accuracy from dummy clock cycles to dummy bytes and by doing this above mentioned SPI controllers will obtain support for the commands requiring those. Signed-off-by: Francisco Iglesias --- hw/ssi/ssi.c | 22 ++++++++++++++++++++++ include/hw/ssi/ssi.h | 3 +++ 2 files changed, 25 insertions(+) diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index e5d7ce9523..b87628ea0c 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -127,6 +127,28 @@ uint32_t ssi_transfer(SSIBus *bus, uint32_t val) return r; } +uint32_t ssi_txfifo_transfer(SSIBus *bus, uint32_t val) +{ + BusState *b = BUS(bus); + BusChild *kid; + SSIPeripheralClass *ssc; + uint32_t r = 0; + + QTAILQ_FOREACH(kid, &b->children, sibling) { + SSIPeripheral *peripheral = SSI_PERIPHERAL(kid->child); + ssc = SSI_PERIPHERAL_GET_CLASS(peripheral); + if (ssc->set_dummy_byte_accuracy) { + ssc->set_dummy_byte_accuracy(peripheral, true); + } + r |= ssc->transfer_raw(peripheral, val); + if (ssc->set_dummy_byte_accuracy) { + ssc->set_dummy_byte_accuracy(peripheral, false); + } + } + + return r; +} + const VMStateDescription vmstate_ssi_peripheral = { .name = "SSISlave", .version_id = 1, diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h index f411858ab0..39bf00ec96 100644 --- a/include/hw/ssi/ssi.h +++ b/include/hw/ssi/ssi.h @@ -54,6 +54,8 @@ struct SSIPeripheralClass { * always be called for the device for every txrx access to the parent bus */ uint32_t (*transfer_raw)(SSIPeripheral *dev, uint32_t val); + + void (*set_dummy_byte_accuracy)(SSIPeripheral *dev, bool val); }; struct SSIPeripheral { @@ -105,5 +107,6 @@ bool ssi_realize_and_unref(DeviceState *dev, SSIBus *bus, Error **errp); SSIBus *ssi_create_bus(DeviceState *parent, const char *name); uint32_t ssi_transfer(SSIBus *bus, uint32_t val); +uint32_t ssi_txfifo_transfer(SSIBus *bus, uint32_t val); #endif