| Message ID | 20210108185154.8108-4-leif@nuviainc.com |
|---|---|
| State | New |
| Headers | show |
| Series | target/arm: various changes to cpu.h | expand |
On 1/8/21 8:51 AM, Leif Lindholm wrote: > When FEAT_MTE is implemented, the AArch64 view of CTR_EL0 adds the > TminLine field in bits [37:32]. > Extend the ctr field to be able to hold this context. > > Signed-off-by: Leif Lindholm <leif@nuviainc.com> > --- > target/arm/cpu.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
On Fri, Jan 8, 2021 at 7:51 PM Leif Lindholm <leif@nuviainc.com> wrote: > > When FEAT_MTE is implemented, the AArch64 view of CTR_EL0 adds the > TminLine field in bits [37:32]. > Extend the ctr field to be able to hold this context. > > Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Thanks, Laurent > --- > target/arm/cpu.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index fadd1a47df..063228de2a 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -931,7 +931,7 @@ struct ARMCPU { > uint64_t midr; > uint32_t revidr; > uint32_t reset_fpsid; > - uint32_t ctr; > + uint64_t ctr; > uint32_t reset_sctlr; > uint64_t pmceid0; > uint64_t pmceid1; > -- > 2.20.1 >
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index fadd1a47df..063228de2a 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -931,7 +931,7 @@ struct ARMCPU { uint64_t midr; uint32_t revidr; uint32_t reset_fpsid; - uint32_t ctr; + uint64_t ctr; uint32_t reset_sctlr; uint64_t pmceid0; uint64_t pmceid1;
When FEAT_MTE is implemented, the AArch64 view of CTR_EL0 adds the TminLine field in bits [37:32]. Extend the ctr field to be able to hold this context. Signed-off-by: Leif Lindholm <leif@nuviainc.com> --- target/arm/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)