Message ID | 20200706061303.246057-18-its@irrelevant.dk |
---|---|
State | New |
Headers | show |
Series | hw/block/nvme: bump to v1.3 | expand |
On 7/6/20 8:13 AM, Klaus Jensen wrote: > From: Klaus Jensen <k.jensen@samsung.com> > > The SUBNQN field is mandatory in NVM Express 1.3. > > Signed-off-by: Klaus Jensen <k.jensen@samsung.com> > --- > hw/block/nvme.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/hw/block/nvme.c b/hw/block/nvme.c > index 07d58aa945f2..e3984157926b 100644 > --- a/hw/block/nvme.c > +++ b/hw/block/nvme.c > @@ -2141,6 +2141,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev) > { > NvmeIdCtrl *id = &n->id_ctrl; > uint8_t *pci_conf = pci_dev->config; > + char *subnqn; > > id->vid = cpu_to_le16(pci_get_word(pci_conf + PCI_VENDOR_ID)); > id->ssvid = cpu_to_le16(pci_get_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID)); > @@ -2179,6 +2180,10 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev) > id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROS | NVME_ONCS_TIMESTAMP | > NVME_ONCS_FEATURES); > > + subnqn = g_strdup_printf("nqn.2019-08.org.qemu:%s", n->params.serial); > + strpadcpy((char *)id->subnqn, sizeof(id->subnqn), subnqn, '\0'); > + g_free(subnqn); > + > id->psd[0].mp = cpu_to_le16(0x9c4); > id->psd[0].enlat = cpu_to_le32(0x10); > id->psd[0].exlat = cpu_to_le32(0x4); > Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Looks good, Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com> On Mon, 2020-07-06 at 08:13 +0200, Klaus Jensen wrote: > From: Klaus Jensen <k.jensen@samsung.com> > > The SUBNQN field is mandatory in NVM Express 1.3. > > Signed-off-by: Klaus Jensen <k.jensen@samsung.com> > --- > hw/block/nvme.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/hw/block/nvme.c b/hw/block/nvme.c > index 07d58aa945f2..e3984157926b 100644 > --- a/hw/block/nvme.c > +++ b/hw/block/nvme.c > @@ -2141,6 +2141,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev) > { > NvmeIdCtrl *id = &n->id_ctrl; > uint8_t *pci_conf = pci_dev->config; > + char *subnqn; > > id->vid = cpu_to_le16(pci_get_word(pci_conf + PCI_VENDOR_ID)); > id->ssvid = cpu_to_le16(pci_get_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID)); > @@ -2179,6 +2180,10 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev) > id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROS | NVME_ONCS_TIMESTAMP | > NVME_ONCS_FEATURES); > > + subnqn = g_strdup_printf("nqn.2019-08.org.qemu:%s", n->params.serial); > + strpadcpy((char *)id->subnqn, sizeof(id->subnqn), subnqn, '\0'); > + g_free(subnqn); > + > id->psd[0].mp = cpu_to_le16(0x9c4); > id->psd[0].enlat = cpu_to_le32(0x10); > id->psd[0].exlat = cpu_to_le32(0x4);
On Mon, 2020-07-06 at 08:13 +0200, Klaus Jensen wrote: > From: Klaus Jensen <k.jensen@samsung.com> > > The SUBNQN field is mandatory in NVM Express 1.3. > > Signed-off-by: Klaus Jensen <k.jensen@samsung.com> > --- > hw/block/nvme.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/hw/block/nvme.c b/hw/block/nvme.c > index 07d58aa945f2..e3984157926b 100644 > --- a/hw/block/nvme.c > +++ b/hw/block/nvme.c > @@ -2141,6 +2141,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev) > { > NvmeIdCtrl *id = &n->id_ctrl; > uint8_t *pci_conf = pci_dev->config; > + char *subnqn; > > id->vid = cpu_to_le16(pci_get_word(pci_conf + PCI_VENDOR_ID)); > id->ssvid = cpu_to_le16(pci_get_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID)); > @@ -2179,6 +2180,10 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev) > id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROS | NVME_ONCS_TIMESTAMP | > NVME_ONCS_FEATURES); > > + subnqn = g_strdup_printf("nqn.2019-08.org.qemu:%s", n->params.serial); > + strpadcpy((char *)id->subnqn, sizeof(id->subnqn), subnqn, '\0'); > + g_free(subnqn); > + > id->psd[0].mp = cpu_to_le16(0x9c4); > id->psd[0].enlat = cpu_to_le32(0x10); > id->psd[0].exlat = cpu_to_le32(0x4); Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Best regards, Maxim Levitsky
diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 07d58aa945f2..e3984157926b 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -2141,6 +2141,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev) { NvmeIdCtrl *id = &n->id_ctrl; uint8_t *pci_conf = pci_dev->config; + char *subnqn; id->vid = cpu_to_le16(pci_get_word(pci_conf + PCI_VENDOR_ID)); id->ssvid = cpu_to_le16(pci_get_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID)); @@ -2179,6 +2180,10 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev) id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROS | NVME_ONCS_TIMESTAMP | NVME_ONCS_FEATURES); + subnqn = g_strdup_printf("nqn.2019-08.org.qemu:%s", n->params.serial); + strpadcpy((char *)id->subnqn, sizeof(id->subnqn), subnqn, '\0'); + g_free(subnqn); + id->psd[0].mp = cpu_to_le16(0x9c4); id->psd[0].enlat = cpu_to_le32(0x10); id->psd[0].exlat = cpu_to_le32(0x4);