| Message ID | 20200317054918.199161-1-npiggin@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v3,1/2] target/ppc: Improve syscall exception logging | expand |
On Tue, Mar 17, 2020 at 03:49:17PM +1000, Nicholas Piggin wrote: > system calls (at least in Linux) use registers r3-r8 for inputs, so > include those registers in the dump. > > This also adds a mode for PAPR hcalls, which have a different calling > convention. > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Applied to a newly created ppc-for-5.1 branch. > --- > Since v2: > - Rebased on top of FWNMI series > > target/ppc/excp_helper.c | 30 ++++++++++++++++++++++++++---- > 1 file changed, 26 insertions(+), 4 deletions(-) > > diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c > index 08bc885ca6..81ee19ebae 100644 > --- a/target/ppc/excp_helper.c > +++ b/target/ppc/excp_helper.c > @@ -57,12 +57,29 @@ static void ppc_hw_interrupt(CPUPPCState *env) > #else /* defined(CONFIG_USER_ONLY) */ > static inline void dump_syscall(CPUPPCState *env) > { > - qemu_log_mask(CPU_LOG_INT, "syscall r0=%016" PRIx64 " r3=%016" PRIx64 > - " r4=%016" PRIx64 " r5=%016" PRIx64 " r6=%016" PRIx64 > + qemu_log_mask(CPU_LOG_INT, "syscall r0=%016" PRIx64 > + " r3=%016" PRIx64 " r4=%016" PRIx64 " r5=%016" PRIx64 > + " r6=%016" PRIx64 " r7=%016" PRIx64 " r8=%016" PRIx64 > " nip=" TARGET_FMT_lx "\n", > ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3), > ppc_dump_gpr(env, 4), ppc_dump_gpr(env, 5), > - ppc_dump_gpr(env, 6), env->nip); > + ppc_dump_gpr(env, 6), ppc_dump_gpr(env, 7), > + ppc_dump_gpr(env, 8), env->nip); > +} > + > +static inline void dump_hcall(CPUPPCState *env) > +{ > + qemu_log_mask(CPU_LOG_INT, "hypercall r3=%016" PRIx64 > + " r4=%016" PRIx64 " r5=%016" PRIx64 " r6=%016" PRIx64 > + " r7=%016" PRIx64 " r8=%016" PRIx64 " r9=%016" PRIx64 > + " r10=%016" PRIx64 " r11=%016" PRIx64 " r12=%016" PRIx64 > + " nip=" TARGET_FMT_lx "\n", > + ppc_dump_gpr(env, 3), ppc_dump_gpr(env, 4), > + ppc_dump_gpr(env, 5), ppc_dump_gpr(env, 6), > + ppc_dump_gpr(env, 7), ppc_dump_gpr(env, 8), > + ppc_dump_gpr(env, 9), ppc_dump_gpr(env, 10), > + ppc_dump_gpr(env, 11), ppc_dump_gpr(env, 12), > + env->nip); > } > > static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp, > @@ -379,9 +396,14 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) > } > break; > case POWERPC_EXCP_SYSCALL: /* System call exception */ > - dump_syscall(env); > lev = env->error_code; > > + if ((lev == 1) && cpu->vhyp) { > + dump_hcall(env); > + } else { > + dump_syscall(env); > + } > + > /* > * We need to correct the NIP which in this case is supposed > * to point to the next instruction
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 08bc885ca6..81ee19ebae 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -57,12 +57,29 @@ static void ppc_hw_interrupt(CPUPPCState *env) #else /* defined(CONFIG_USER_ONLY) */ static inline void dump_syscall(CPUPPCState *env) { - qemu_log_mask(CPU_LOG_INT, "syscall r0=%016" PRIx64 " r3=%016" PRIx64 - " r4=%016" PRIx64 " r5=%016" PRIx64 " r6=%016" PRIx64 + qemu_log_mask(CPU_LOG_INT, "syscall r0=%016" PRIx64 + " r3=%016" PRIx64 " r4=%016" PRIx64 " r5=%016" PRIx64 + " r6=%016" PRIx64 " r7=%016" PRIx64 " r8=%016" PRIx64 " nip=" TARGET_FMT_lx "\n", ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3), ppc_dump_gpr(env, 4), ppc_dump_gpr(env, 5), - ppc_dump_gpr(env, 6), env->nip); + ppc_dump_gpr(env, 6), ppc_dump_gpr(env, 7), + ppc_dump_gpr(env, 8), env->nip); +} + +static inline void dump_hcall(CPUPPCState *env) +{ + qemu_log_mask(CPU_LOG_INT, "hypercall r3=%016" PRIx64 + " r4=%016" PRIx64 " r5=%016" PRIx64 " r6=%016" PRIx64 + " r7=%016" PRIx64 " r8=%016" PRIx64 " r9=%016" PRIx64 + " r10=%016" PRIx64 " r11=%016" PRIx64 " r12=%016" PRIx64 + " nip=" TARGET_FMT_lx "\n", + ppc_dump_gpr(env, 3), ppc_dump_gpr(env, 4), + ppc_dump_gpr(env, 5), ppc_dump_gpr(env, 6), + ppc_dump_gpr(env, 7), ppc_dump_gpr(env, 8), + ppc_dump_gpr(env, 9), ppc_dump_gpr(env, 10), + ppc_dump_gpr(env, 11), ppc_dump_gpr(env, 12), + env->nip); } static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp, @@ -379,9 +396,14 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) } break; case POWERPC_EXCP_SYSCALL: /* System call exception */ - dump_syscall(env); lev = env->error_code; + if ((lev == 1) && cpu->vhyp) { + dump_hcall(env); + } else { + dump_syscall(env); + } + /* * We need to correct the NIP which in this case is supposed * to point to the next instruction
system calls (at least in Linux) use registers r3-r8 for inputs, so include those registers in the dump. This also adds a mode for PAPR hcalls, which have a different calling convention. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- Since v2: - Rebased on top of FWNMI series target/ppc/excp_helper.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-)