Message ID | 20200316053314.194936-1-xiaoyao.li@intel.com |
---|---|
State | New |
Headers | show |
Series | target/i386: Add ARCH_CAPABILITIES related bits into Icelake-Server CPU model | expand |
On 16/03/20 06:33, Xiaoyao Li wrote: > Current Icelake-Server CPU model lacks all the features enumerated by > MSR_IA32_ARCH_CAPABILITIES. > > Add them, so that guest of "Icelake-Server" can see all of them. > > Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> > --- > target/i386/cpu.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 92fafa265914..5f09d114e1c2 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -3425,7 +3425,12 @@ static X86CPUDefinition builtin_x86_defs[] = { > CPUID_7_0_ECX_AVX512VNNI | CPUID_7_0_ECX_AVX512BITALG | > CPUID_7_0_ECX_AVX512_VPOPCNTDQ | CPUID_7_0_ECX_LA57, > .features[FEAT_7_0_EDX] = > - CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD, > + CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_ARCH_CAPABILITIES | > + CPUID_7_0_EDX_SPEC_CTRL_SSBD, > + .features[FEAT_ARCH_CAPABILITIES] = > + MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_IBRS_ALL | > + MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO | > + MSR_ARCH_CAP_PSCHANGE_MC_NO | MSR_ARCH_CAP_TAA_NO, > /* Missing: XSAVES (not supported by some Linux versions, > * including v4.1 to v4.12). > * KVM doesn't yet expose any XSAVES state save component, > Hi Xiaoyao, you need to add them as a new version of the CPU model. Paolo
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 92fafa265914..5f09d114e1c2 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3425,7 +3425,12 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_7_0_ECX_AVX512VNNI | CPUID_7_0_ECX_AVX512BITALG | CPUID_7_0_ECX_AVX512_VPOPCNTDQ | CPUID_7_0_ECX_LA57, .features[FEAT_7_0_EDX] = - CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD, + CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_ARCH_CAPABILITIES | + CPUID_7_0_EDX_SPEC_CTRL_SSBD, + .features[FEAT_ARCH_CAPABILITIES] = + MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_IBRS_ALL | + MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO | + MSR_ARCH_CAP_PSCHANGE_MC_NO | MSR_ARCH_CAP_TAA_NO, /* Missing: XSAVES (not supported by some Linux versions, * including v4.1 to v4.12). * KVM doesn't yet expose any XSAVES state save component,
Current Icelake-Server CPU model lacks all the features enumerated by MSR_IA32_ARCH_CAPABILITIES. Add them, so that guest of "Icelake-Server" can see all of them. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> --- target/i386/cpu.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)