@@ -4079,7 +4079,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
MachineState *ms = MACHINE(qdev_get_machine());
X86CPU *cpu = env_archcpu(env);
CPUState *cs = env_cpu(env);
- uint32_t die_offset;
+ uint32_t die_offset, pkg_offset;
uint32_t limit;
uint32_t signature[3];
@@ -4102,6 +4102,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
index = env->cpuid_level;
}
+ if (!strncmp(ms->cpu_type, "EPYC", 4))
+ pkg_offset = PKG_OFFSET_EPYC;
+ else
+ pkg_offset = apicid_pkg_offset(env->nr_dies, cs->nr_cores,
+ cs->nr_threads);
+
switch(index) {
case 0:
*eax = env->cpuid_level;
@@ -4260,8 +4266,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
*ecx |= CPUID_TOPOLOGY_LEVEL_SMT;
break;
case 1:
- *eax = apicid_pkg_offset(env->nr_dies,
- cs->nr_cores, cs->nr_threads);
+ *eax = pkg_offset;
*ebx = cs->nr_cores * cs->nr_threads;
*ecx |= CPUID_TOPOLOGY_LEVEL_CORE;
break;
@@ -4297,8 +4302,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
*ecx |= CPUID_TOPOLOGY_LEVEL_CORE;
break;
case 2:
- *eax = apicid_pkg_offset(env->nr_dies, cs->nr_cores,
- cs->nr_threads);
+ *eax = pkg_offset;
*ebx = env->nr_dies * cs->nr_cores * cs->nr_threads;
*ecx |= CPUID_TOPOLOGY_LEVEL_DIE;
break;
Per Processor Programming Reference (PPR) for AMD Family 17h Models, the pkg_id offset in apicid is 6. Fix the offset based on EPYC models. Signed-off-by: Babu Moger <babu.moger@amd.com> --- target/i386/cpu.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-)